DUAL ACCELEROMETER DETECTOR FOR CLAMSHELL DEVICES
    11.
    发明申请
    DUAL ACCELEROMETER DETECTOR FOR CLAMSHELL DEVICES 审中-公开
    用于CLAMSHELL设备的双加速度计检测器

    公开(公告)号:US20110179864A1

    公开(公告)日:2011-07-28

    申请号:US12694835

    申请日:2010-01-27

    IPC分类号: G01P1/00

    摘要: A clamshell device having a dual accelerometer detector includes a first keyboard portion including a first accelerometer, a second display portion including a second accelerometer, a hinge for coupling the first portion to the second portion, and circuitry coupled to the first and second accelerometers for providing an output signal in response to the position of the first and second portions of the clamshell device. The output signal is provided to indicate a shutdown or standby mode, tablet operation mode, a partially shut or power savings mode, a normal operating mode, or an unsafe operating mode.

    摘要翻译: 具有双加速度计检测器的蛤壳式装置包括:第一键盘部分,包括第一加速度计,包括第二加速度计的第二显示部分,用于将第一部分耦合到第二部分的铰链;以及耦合到第一和第二加速度计的电路, 响应于蛤壳式装置的第一和第二部分的位置的输出信号。 提供输出信号以指示关机或待机模式,平板电脑操作模式,部分关闭或省电模式,正常操作模式或不安全操作模式。

    Double crucible Czochralski crystal growth apparatus
    13.
    发明授权
    Double crucible Czochralski crystal growth apparatus 失效
    双坩埚切克劳斯基晶体生长仪

    公开(公告)号:US4352784A

    公开(公告)日:1982-10-05

    申请号:US42693

    申请日:1979-05-25

    申请人: Wen Lin

    发明人: Wen Lin

    IPC分类号: C30B15/12

    CPC分类号: C30B15/12 Y10T117/1052

    摘要: An apparatus useful for double crucible Czochralski crystal growth comprises an inner crucible fixed within an outer crucible wherein the inner crucible contains an extra volume or reservoir of semiconductor melt when flow of semiconductor melt from the outer crucible into the inner crucible through means interconnecting the crucibles ceases.

    摘要翻译: 可用于双坩埚切克隆斯基晶体生长的装置包括固定在外坩埚内的内坩埚,其中,当半导体熔体从外坩埚通过互连坩埚停止的装置流入内坩埚时,内坩埚含有额外体积或半导体熔体储存器 。

    Double crucible crystal growing apparatus
    14.
    发明授权
    Double crucible crystal growing apparatus 失效
    双坩埚晶体生长装置

    公开(公告)号:US4190631A

    公开(公告)日:1980-02-26

    申请号:US944454

    申请日:1978-09-21

    IPC分类号: C30B15/12 B01J17/18

    摘要: The disclosure is directed to a double crucible Czochralski crystal semiconductor growing apparatus (10). An inner crucible (14) floats in a melt within an outer crucible (13) and a single crystal semiconductor billet (23) is pulled from the melt (16) in the inner crucible. An elongated tubular member (26), having at least one small aperture (33) in the wall thereof, provides a channel between the outer and inner crucibles. The tubular member (26) permits flow of the melt in the outer crucible (14) to the inner crucible (13) while inhibiting the diffusion of dopant material from the inner to outer crucible while any gas in the member will pass through the aperture (33).

    摘要翻译: 本公开涉及一种双坩埚切克劳斯基晶体半导体生长装置(10)。 内坩埚(14)漂浮在外坩埚(13)内的熔体中,并且从内坩埚中的熔体(16)拉出单晶半导体坯料(23)。 在其壁中具有至少一个小孔(33)的细长管状构件(26)在外坩埚和内坩埚之间提供通道。 管状构件(26)允许外坩埚(14)中的熔体流动到内坩埚(13),同时阻止掺杂剂材料从内坩埚扩散到外坩埚,同时构件中的任何气体将通过孔( 33)。

    Driving system of liquid crystal display
    15.
    发明申请
    Driving system of liquid crystal display 审中-公开
    液晶显示驱动系统

    公开(公告)号:US20060077197A1

    公开(公告)日:2006-04-13

    申请号:US11254910

    申请日:2005-10-21

    申请人: Wen Lin

    发明人: Wen Lin

    IPC分类号: G09G5/00

    摘要: A driving system of a liquid crystal display includes a pixel data line, a timing controller, a source driver and a gate driver. The pixel data line provides pixel data to the source driver directly. The timing controller is operative to receive a clock signal and a synchronization signal, so as to output a source control signal and a gate control signal. The source driver receives the clock signal, the source control signal and the pixel data, so as to output an image data signal. Upon receiving the gate control signal, the gate driver is operative to output an on/off signal.

    摘要翻译: 液晶显示器的驱动系统包括像素数据线,定时控制器,源极驱动器和栅极驱动器。 像素数据线直接向源驱动器提供像素数据。 定时控制器用于接收时钟信号和同步信号,以输出源控制信号和门控制信号。 源极驱动器接收时钟信号,源极控制信号和像素数据,以输出图像数据信号。 在接收到栅极控制信号时,栅极驱动器可操作以输出开/关信号。

    Methods and systems for facilitating the provision of opinions to a shopper from a panel of peers
    16.
    发明申请
    Methods and systems for facilitating the provision of opinions to a shopper from a panel of peers 有权
    方便和系统,方便从同行小组向顾客提供意见

    公开(公告)号:US20050027612A1

    公开(公告)日:2005-02-03

    申请号:US10864834

    申请日:2004-06-09

    IPC分类号: H04H60/31 G06Q30/00 G06F17/60

    摘要: In accordance with one or more embodiments, a system determines an image, selects a panel of participants, and outputs the image to each of the participants of the panel of participants. The image may be an image of a garment a shopper is considering purchasing, an image of the shopper wearing the garment, or an image of a virtual model of the shopper combined with an image of the garment. The panel of participants may be selected based on a characteristic associated with the shopper. The image may be output to the panel of participants along with a request for an opinion regarding the garment (e.g., “Buy It” or “Don't Buy It”). The responses may be collected from the participants and an indication of the results may be output to the shopper.

    摘要翻译: 根据一个或多个实施例,系统确定图像,选择一组参与者,并将图像输出到参与者组的每个参与者。 图像可以是购物者正在考虑购买的服装的图像,穿着衣服的购物者的图像,或者与服装的图像相结合的购物者的虚拟模型的图像。 可以基于与购物者相关联的特征来选择参与者小组。 图像可以输出到参与者小组以及关于服装的意见的请求(例如,“购买”或“不买它”)。 答复可以从参与者收集,结果的指示可以输出给购物者。

    Simplified high Q inductor substrate
    17.
    发明授权
    Simplified high Q inductor substrate 有权
    简化的高Q电感基板

    公开(公告)号:US06225182B1

    公开(公告)日:2001-05-01

    申请号:US09386132

    申请日:1999-08-30

    IPC分类号: H01L21331

    摘要: The present invention provides for a method of manufacturing a simplified high Q inductor substrate and a semiconductor device having that substrate. The method for manufacturing the simplified high Q inductor substrate preferably comprises forming a base substrate over a semiconductor wafer, wherein the base substrate has a given dopant concentration and then forming an epitaxial (EPI) layer over the base substrate. The EPI layer includes epitaxially forming a first doped region in the EPI layer over the base substrate and then epitaxially forming a second doped region in the EPI layer over the first doped region. The first doped region has a dopant concentration greater than the given dopant concentration of the base substrate, and the second doped region has a dopant concentration less than the first doped region.

    摘要翻译: 本发明提供一种制造简化的高Q电感器基板的方法和具有该基板的半导体器件。 制造简化的高Q电感器衬底的方法优选地包括在半导体晶片上形成基底衬底,其中基底衬底具有给定的掺杂剂浓度,然后在基底衬底上形成外延(EPI)层。 EPI层包括在基底衬底上的外延形成EPI层中的第一掺杂区域,然后在第一掺杂区域上在EPI层中外延形成第二掺杂区域。 第一掺杂区域具有大于基底衬底的给定掺杂剂浓度的掺杂剂浓度,并且第二掺杂区域具有小于第一掺杂区域的掺杂剂浓度。

    Stress relief in epitaxial wafers
    18.
    发明授权
    Stress relief in epitaxial wafers 失效
    外延晶圆的应力消除

    公开(公告)号:US4769689A

    公开(公告)日:1988-09-06

    申请号:US73296

    申请日:1987-07-13

    申请人: Wen Lin

    发明人: Wen Lin

    IPC分类号: H01L21/20 H01L29/167

    CPC分类号: H01L21/02658 H01L21/02381

    摘要: The specification describes an epitaxial structure designed to reduce or eliminate the bowing of semiconductor wafers due to stresses caused by lattice mismatch between a heavily boron doped substrate and a lightly doped epitaxial layer. The lattice mismatch is reduced or eliminated by doping germanium into the substrate prior to epitaxial growth.

    摘要翻译: 本说明书描述了一种外延结构,其设计用于减少或消除由于重硼掺杂衬底和轻掺杂外延层之间的晶格失配引起的应力引起的半导体晶片的弯曲。 在外延生长之前,通过将锗掺杂到衬底中来减小或消除晶格失配。

    Producing a perfect P-N junction
    19.
    发明申请
    Producing a perfect P-N junction 审中-公开
    生产完美的P-N结

    公开(公告)号:US20120068269A1

    公开(公告)日:2012-03-22

    申请号:US13232099

    申请日:2011-09-14

    申请人: Wen Lin

    发明人: Wen Lin

    IPC分类号: H01L27/06 H01L21/326

    摘要: This patent disclosure presents circuits, system, and method to produce an ideal memory cell and a method to produce a perfect PN junction without undesirable junction voltage and leakage current. These new inventions finally perfect the art to produce PN junction diode sixty years after PN junction diode was invented and the technology to produce an indestructible nonvolatile memory cell that is fast and small.

    摘要翻译: 该专利公开提供了用于产生理想存储器单元的电路,系统和方法以及产生完美PN结的方法,而没有不希望的结电压和漏电流。 这些新发明终于完善了在PN结二极管发明六十年后生产PN结二极管的技术,并且该技术生产出一个快速和小巧的不可毁灭的非易失性存储器单元。

    METHOD OF IMPROVING A SURFACE OF A SEMICONDUCTOR SUBSTRATE
    20.
    发明申请
    METHOD OF IMPROVING A SURFACE OF A SEMICONDUCTOR SUBSTRATE 有权
    改善半导体衬底表面的方法

    公开(公告)号:US20080124899A1

    公开(公告)日:2008-05-29

    申请号:US11677871

    申请日:2007-02-22

    申请人: Wen Lin

    发明人: Wen Lin

    IPC分类号: H01L21/322

    CPC分类号: H01L21/02636

    摘要: The invention relates to a method of improving a surface of a semiconductor substrate which is at least partially made of silicon. Defects present in or on the semiconductor substrate can be really repaired to provide a semiconductor substrate with a high surface quality. This is achieved by a selective epitaxial deposition in the at least one hole in the surface of the semiconductor substrate. Generally, the deposition step is preceded by an etching step which removes the defects and leaves behind at least one hole that can be plugged or filled with the selective epitaxial deposition of silicon to repair the substrate.

    摘要翻译: 本发明涉及一种改善至少部分由硅制成的半导体衬底表面的方法。 存在于半导体衬底中或之上的缺陷可以被真正修复,以提供具有高表面质量的半导体衬底。 这通过在半导体衬底的表面中的至少一个孔中的选择性外延沉积来实现。 通常,沉积步骤之前是蚀刻步骤,其去除缺陷并留下至少一个可以用硅的选择性外延沉积来堵塞或填充以修复衬底的孔。