公开(公告)号：US20120097946A1

公开(公告)日：2012-04-26

申请号：US13381435

申请日：2010-07-05

Applicant: Pierre Gidon ,  Benoit Giffard ,  Norbert Moussy

Inventor： Pierre Gidon ,  Benoit Giffard ,  Norbert Moussy

IPC: H01L27/146 ,  H01L31/18

CPC classification number: H01L27/14647 ,  H01L27/14603 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/14687 ,  H01L27/14689 ,  H01L27/14692 ,  H01L31/022408

Abstract: A photo-detecting device including a plurality of pixels, each including at least one alternate stack of photodiodes and electrically conducting electrodes. Each photodiode includes one intrinsic amorphous semiconductor layer in contact with one doped amorphous semiconductor layer distinct from the amorphous semiconductor layers in other photodiodes, and is arranged between two electrodes. Each pair of photodiodes includes one of the electrodes arranged between photodiodes. In each pixel: each electrode includes an electrically conducting portion not superposed on other electrodes of the pixel and electrically connected to one interconnection hole filled with an electrically conducting material; and portions of an electrically conducting material are superposed approximately on each of non-superposed portions of electrodes.

Abstract translation: 一种光检测装置，包括多个像素，每个像素包括至少一个交替的光电二极管和导电电极。 每个光电二极管包括与其它光电二极管中的非晶半导体层不同的一个掺杂非晶半导体层接触的本征非晶半导体层，并且布置在两个电极之间。 每对光电二极管包括布置在光电二极管之间的电极之一。 在每个像素中：每个电极包括不叠置在像素的其他电极上的导电部分，并且电连接到填充有导电材料的一个互连孔; 并且导电材料的部分大致重叠在电极的非重叠部分中的每一个上。

公开(公告)号：US4954989A

公开(公告)日：1990-09-04

申请号：US335732

申请日：1989-04-10

Applicant: Andre-Jacques Auberton-Herve ,  Benoit Giffard

Inventor： Andre-Jacques Auberton-Herve ,  Benoit Giffard

IPC: G11C11/411 ,  G11C7/00 ,  G11C11/40 ,  H01L27/10

CPC classification number: G11C11/40 ,  G11C7/005

Abstract: A static memory cell of the metal-insulator-semiconductor type, which can be used in the microelectronics field for producing random access memories for storing binary information. This MIS type memory cell is a random access static memory cell known under the abbreviation SRAM. A bistable flip-flop is formed by a MIS transistor and a parasitic bipolar transistor. The source and drain of the MIS transistor respectively formed by constituting the emitter and collector of the bipolar transistor. The region of the channel of the MIS transistor located between the source and drain serves as the base for the bipolar transistor. The base is completely isolated from the outside of the memory cell. The gate electrode of the MIS transistor is electrically isolated from the region of the channel. There is an addressing circuit for the flip-flop for storing binary information in the form of the absence or presence of current.

Abstract translation: 金属 - 绝缘体 - 半导体类型的静态存储单元，其可以用于微电子领域中，用于产生用于存储二进制信息的随机存取存储器。 这种MIS型存储单元是在缩写SRAM下面已知的随机存取静态存储单元。 双稳态触发器由MIS晶体管和寄生双极晶体管形成。 分别通过构成双极晶体管的发射极和集电极形成的MIS晶体管的源极和漏极。 位于源极和漏极之间的MIS晶体管的沟道的区域用作双极晶体管的基极。 基座与存储单元的外部完全隔离。 MIS晶体管的栅电极与沟道的区域电隔离。 存在用于以不存在或存在电流的形式存储二进制信息的触发器的寻址电路。

公开(公告)号：US08835924B2

公开(公告)日：2014-09-16

申请号：US13381435

申请日：2010-07-05

Applicant: Pierre Gidon ,  Benoit Giffard ,  Norbert Moussy

Inventor： Pierre Gidon ,  Benoit Giffard ,  Norbert Moussy

IPC: H01L29/04 ,  H01L27/146 ,  H01L31/0224

CPC classification number: H01L27/14647 ,  H01L27/14603 ,  H01L27/14632 ,  H01L27/14636 ,  H01L27/14687 ,  H01L27/14689 ,  H01L27/14692 ,  H01L31/022408

Abstract: A photo-detecting device including a plurality of pixels, each including at least one alternate stack of photodiodes and electrically conducting electrodes. Each photodiode includes one intrinsic amorphous semiconductor layer in contact with one doped amorphous semiconductor layer distinct from the amorphous semiconductor layers in other photodiodes, and is arranged between two electrodes. Each pair of photodiodes includes one of the electrodes arranged between photodiodes. In each pixel: each electrode includes an electrically conducting portion not superposed on other electrodes of the pixel and electrically connected to one interconnection hole filled with an electrically conducting material; and portions of an electrically conducting material are superposed approximately on each of non-superposed portions of electrodes.

Abstract translation: 一种光检测装置，包括多个像素，每个像素包括至少一个交替的光电二极管和导电电极。 每个光电二极管包括与其它光电二极管中的非晶半导体层不同的一个掺杂非晶半导体层接触的本征非晶半导体层，并且布置在两个电极之间。 每对光电二极管包括布置在光电二极管之间的电极之一。 在每个像素中：每个电极包括不叠置在像素的其他电极上的导电部分，并且电连接到填充有导电材料的一个互连孔; 并且导电材料的部分大致重叠在电极的非重叠部分中的每一个上。

公开(公告)号：US5439836A

公开(公告)日：1995-08-08

申请号：US274452

申请日：1994-07-13

Applicant: Benoit Giffard

Inventor： Benoit Giffard

IPC: H01L29/78 ,  H01L21/336 ,  H01L29/786 ,  H01L21/86

CPC classification number: H01L29/78696 ,  H01L29/66772 ,  H01L29/78618 ,  Y10S148/15

Abstract: Method for producing a silicon technology transistor on a nonconductor. This method consists in particular of forming a thin film of silicon (6) on a nonconductor (4) and then a mask (8, 10) including one opening (13) at the location provided for the channel (26) of the transistor; of locally oxidizing (14) the unmasked silicon to form an oxidation film; of eliminating the mask; of forming source (18) and drain (20) regions in the silicon by ion implantation with the oxidation film being used to mask this implantation; of eliminating the oxidation film; and of forming a thin gate nonconductor between the source and the drain and then forming the gate.

Abstract translation: 在非导体上制造硅技术晶体管的方法。 该方法特别涉及在非导体（4）上形成硅（6）薄膜，然后在为晶体管的沟道（26）提供的位置处包括一个开口（13）的掩模（8,10） 局部氧化（14）未掩蔽的硅以形成氧化膜; 消除面具; 通过离子注入在硅中形成源极（18）和漏极（20）区域，氧化膜用于掩蔽该植入; 消除氧化膜; 并且在源极和漏极之间形成薄栅极非导体，然后形成栅极。