Abstract:
Single inductor multiple output (SIMO) switching devices with efficient regulating circuits. The SIMO switching device includes a plurality of time division multiplexing (TDM) switches for switching current through an inductor of the SIMO switching device. The plurality of TDM switches produces a plurality of outputs. The SIMO switching device further includes an error calculation circuit operatively coupled to the plurality of outputs for determining a calculated error from the plurality of outputs; a time slot generation circuit for controlling the plurality of TDM switches according to the calculated error; and a pulse width modulation (PWM) control circuit operatively coupled to the time slot generation circuit for controlling a plurality of PWM switches of a switching stage of the SIMO switching device in a continuous conduction mode (CCM) of operation. The PWM switches are controlled according to the time slots generated by the time slot generation circuit.
Abstract:
Methods and systems for designing a high resolution analog to digital converter (ADC) by eliminating the errors in the ADC stages. An error correction architecture and method eliminate the gain error and settling error of the residue amplifier in a pipelined ADC stage. A reference voltage error correction architecture and method eliminate the reference voltage error due to the sampling action in the ADC. The gain error correction method calculates the gain error using an error amplifier and eliminates the gain error at a later stage of the ADC. The reference voltage error correction method calculates the reference voltage error using an ideal reference voltage and corrects the error at a later stage of the ADC. Therefore, the constraints of gain and settling of the residue amplifier is significantly reduced.
Abstract:
A method for biasing a MOS transistor includes AC coupling an input signal from an amplifier stage to a gate of the MOS transistor. The method includes connecting a pair of diodes in an opposing parallel configuration to a bias transistor and a current source. Further, the method includes generating a DC bias voltage through the bias transistor and the current source. The method also includes clamping the voltage at drain of the bias transistor to a fixed voltage by a clamping circuit. Further, the method includes coupling the DC bias voltage to the gate of the MOS transistor through the pair of diodes.
Abstract:
Efficient switch cascode architecture for switching devices, such as switching regulators. The cascode architecture includes a switching stage responsive to an external driver signal for switching transitions, and a bias generator operative to bias the cascode transistor of the switching stage to protect the switching stage from damage during the switching transitions.
Abstract:
Single inductor multiple output (SIMO) switching devices with efficient regulating circuits. The SIMO switching device includes a plurality of time division multiplexing (TDM) switches for switching current through an inductor of the SIMO switching device. The plurality of TDM switches produces a plurality of outputs. The SIMO switching device further includes an error calculation circuit operatively coupled to the plurality of outputs for determining a calculated error from the plurality of outputs; a time slot generation circuit for controlling the plurality of TDM switches according to the calculated error; and a pulse width modulation (PWM) control circuit operatively coupled to the time slot generation circuit for controlling a plurality of PWM switches of a switching stage of the SIMO switching device in a continuous conduction mode (CCM) of operation. The PWM switches are controlled according to the time slots generated by the time slot generation circuit.
Abstract:
A system and method for improving the dynamic performance in an analog-to-digital converter (ADC) by randomizing the differential mismatch. The differential mismatch in an input analog signal is randomized by flipping the input signal and output signal randomly.
Abstract:
A transient recovery circuit for switching devices. The transient recovery circuit includes a detecting circuit for detecting a rapid transient in an output voltage of a switching device by detecting a rate of the output voltage transient; an auxiliary controlling circuit in a feedback loop of the switching device for correcting the output voltage by changing a bandwidth of the feedback loop if the rapid transient is detected; and an initializing circuit for initializing the feedback loop to expected operating points in a continuous conduction mode after correcting the output voltage.
Abstract:
A circuit for optimizing a power management system. The circuit includes a first amplifier. The first amplifier is responsive to a first reference signal and operable to supply a first load current. The circuit also includes a second amplifier coupled to the first amplifier. The second amplifier is responsive to a second reference signal and operable to supply a second load current. The second load current is lower in magnitude than the first load current, thereby enabling the first amplifier to operate during a first load condition, and the second amplifier to operate during the first load condition and a second load condition. Further, the circuit includes a resistive element coupled to the first amplifier and the second amplifier, to isolate the first amplifier from the second amplifier.
Abstract:
A transient recovery circuit for switching devices. The transient recovery circuit includes a detecting circuit for detecting a rapid transient in an output voltage of a switching device by detecting a rate of the output voltage transient; an auxiliary controlling circuit in a feedback loop of the switching device for correcting the output voltage by changing a bandwidth of the feedback loop if the rapid transient is detected; and an initializing circuit for initializing the feedback loop to expected operating points in a continuous conduction mode after correcting the output voltage.
Abstract:
Efficient switch cascode architecture for switching devices, such as switching regulators. The cascode architecture includes a switching stage responsive to an external driver signal for switching transitions, and a bias generator operative to bias the cascode transistor of the switching stage to protect the switching stage from damage during the switching transitions.