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    Leakage independent very low bandwith current filter
    1.
    发明授权
    Leakage independent very low bandwith current filter 有权
    漏电独立非常低带电滤波器

    公开(公告)号：US07868688B2

    公开(公告)日：2011-01-11

    申请号：US12463389

    申请日：2009-05-09

    申请人： Prakash Easwaran ,  Prasenjit Bhowmik ,  Sumeet Mathur

    发明人： Prakash Easwaran ,  Prasenjit Bhowmik ,  Sumeet Mathur

    IPC分类号： H03K5/00

    CPC分类号： H03F3/345

    摘要： A current filter circuit is provided. The current filter circuit comprises a source transistor comprising a drain, a gate, and a source. The source of the source transistor is coupled to a reference voltage terminal, the gate of the source transistor is coupled to the gate of a mirror transistor, and the drain of the source transistor is coupled to a reference current source. The mirror transistor comprises a drain, a gate, and a source. The source of the mirror transistor is coupled to the reference voltage terminal, the gate is coupled to the gate of the source transistor, and the drain is coupled to a load. The current filter circuit comprises a low pass filter for filtering noise. The current filter circuit also comprises an impedance reduction circuit coupled to the drain of the mirror transistor for reducing bandwidth of the current filter circuit.

    摘要翻译： 提供电流滤波电路。 电流滤波器电路包括源极晶体管，源极晶体管包括漏极，栅极和源极。 源极晶体管的源极耦合到参考电压端子，源极晶体管的栅极耦合到反射镜晶体管的栅极，源极晶体管的漏极耦合到参考电流源。 反射镜晶体管包括漏极，栅极和源极。 反射镜晶体管的源极耦合到参考电压端子，栅极耦合到源极晶体管的栅极，并且漏极耦合到负载。 电流滤波电路包括用于滤除噪声的低通滤波器。 电流滤波器电路还包括耦合到镜晶体管的漏极的阻抗减小电路，用于减小电流滤波器电路的带宽。

    DC biasing circuit for a metal oxide semiconductor transistor
    2.
    发明授权
    DC biasing circuit for a metal oxide semiconductor transistor 有权
    用于金属氧化物半导体晶体管的直流偏置电路

    公开(公告)号：US08106706B2

    公开(公告)日：2012-01-31

    申请号：US12463390

    申请日：2009-05-09

    申请人： Prakash Easwaran ,  Prasenjit Bhowmik ,  Sumeet Mathur

    发明人： Prakash Easwaran ,  Prasenjit Bhowmik ,  Sumeet Mathur

    IPC分类号： G05F1/10 ,  G05F3/02

    CPC分类号： G05F3/26 ,  H03F1/301

    摘要： A method for biasing a MOS transistor includes AC coupling an input signal from an amplifier stage to a gate of the MOS transistor. The method includes connecting a pair of diodes in an opposing parallel configuration to a bias transistor and a current source. Further, the method includes generating a DC bias voltage through the bias transistor and the current source. The method also includes clamping the voltage at drain of the bias transistor to a fixed voltage by a clamping circuit. Further, the method includes coupling the DC bias voltage to the gate of the MOS transistor through the pair of diodes.

    摘要翻译： 用于偏置MOS晶体管的方法包括将来自放大器级的输入信号AC耦合到MOS晶体管的栅极。 该方法包括将一对相反并联配置的二极管连接到偏置晶体管和电流源。 此外，该方法包括通过偏置晶体管和电流源产生DC偏置电压。 该方法还包括通过钳位电路将偏置晶体管的漏极处的电压钳位到固定电压。 此外，该方法包括通过一对二极管将DC偏置电压耦合到MOS晶体管的栅极。

    Reducing power consumption in a voltage regulator
    7.
    发明授权
    Reducing power consumption in a voltage regulator 有权
    降低电压调节器的功耗

    公开(公告)号：US08878510B2

    公开(公告)日：2014-11-04

    申请号：US13472461

    申请日：2012-05-15

    申请人： Prasun Kali Bhattacharyya ,  Prakash Easwaran

    发明人： Prasun Kali Bhattacharyya ,  Prakash Easwaran

    IPC分类号： G05F3/08

    CPC分类号： G05F1/565 ,  G05F1/575

    摘要： A voltage regulator includes an amplifier, a first buffer and a second buffer. The amplifier is designed to generate an error voltage between a reference voltage and a voltage at an output node of the voltage regulator. The first buffer is coupled to receive the amplified error voltage and, in response, to drive a first pass transistor. The first buffer includes a non-linear resistance element. The resistance of the non-linear resistance element varies non-linearly with a load current drawn from the output node. The second buffer is coupled to receive the amplified error voltage, and in response, to drive a second pass transistor. The second buffer includes a linear resistance element. The resistance of the linear element is a constant. The use of the non-linear resistance element enables reduction in power consumption in the voltage regulator.

    摘要翻译： 电压调节器包括放大器，第一缓冲器和第二缓冲器。 放大器设计用于在电压调节器的输出节点处产生参考电压和电压之间的误差电压。 第一缓冲器被耦合以接收放大的误差电压，并且作为响应来驱动第一传输晶体管。 第一缓冲器包括非线性电阻元件。 非线性电阻元件的电阻随从输出节点引出的负载电流而非线性变化。 第二缓冲器被耦合以接收放大的误差电压，并且响应于驱动第二传输晶体管。 第二缓冲器包括线性电阻元件。 线性元件的电阻是一个常数。 使用非线性电阻元件能够降低电压调节器的功耗。

    Transient recovery circuit for switching devices
    8.
    发明授权
    Transient recovery circuit for switching devices 失效
    用于开关器件的瞬态恢复电路

    公开(公告)号：US08242762B2

    公开(公告)日：2012-08-14

    申请号：US12436136

    申请日：2009-05-06

    申请人： Hrishikesh Bhagwat ,  Rupak Ghayal ,  Saumitra Singh ,  Pawan Gupta ,  Prakash Easwaran

    发明人： Hrishikesh Bhagwat ,  Rupak Ghayal ,  Saumitra Singh ,  Pawan Gupta ,  Prakash Easwaran

    IPC分类号： G05F1/575

    CPC分类号： H02M3/1588 ,  Y02B70/1466

    摘要： A transient recovery circuit for switching devices. The transient recovery circuit includes a detecting circuit for detecting a rapid transient in an output voltage of a switching device by detecting a rate of the output voltage transient; an auxiliary controlling circuit in a feedback loop of the switching device for correcting the output voltage by changing a bandwidth of the feedback loop if the rapid transient is detected; and an initializing circuit for initializing the feedback loop to expected operating points in a continuous conduction mode after correcting the output voltage.

    摘要翻译： 用于开关器件的瞬态恢复电路。 瞬态恢复电路包括检测电路，用于通过检测输出电压瞬变的速率来检测开关装置的输出电压中的快速瞬变; 所述开关装置的反馈环路中的辅助控制电路，用于通过在检测到所述快速瞬变时改变所述反馈回路的带宽来校正所述输出电压; 以及用于在校正输出电压之后将连续导通模式中的反馈回路初始化为期望工作点的初始化电路。

    Single inductor multiple output switching devices
    9.
    发明授权
    Single inductor multiple output switching devices 有权
    单电感多输出开关器件

    公开(公告)号：US08049472B2

    公开(公告)日：2011-11-01

    申请号：US12463388

    申请日：2009-05-09

    申请人： Prakash Easwaran ,  Rupak Ghayal ,  Raghavendra Rao Haresamudram

    发明人： Prakash Easwaran ,  Rupak Ghayal ,  Raghavendra Rao Haresamudram

    IPC分类号： G05F1/577

    CPC分类号： H02M3/158 ,  H02M2001/009

    摘要： Single inductor multiple output (SIMO) switching devices with efficient regulating circuits. The SIMO switching device includes a plurality of time division multiplexing (TDM) switches for switching current through an inductor of the SIMO switching device. The plurality of TDM switches produces a plurality of outputs. The SIMO switching device further includes an error calculation circuit operatively coupled to the plurality of outputs for determining a calculated error from the plurality of outputs; a time slot generation circuit for controlling the plurality of TDM switches according to the calculated error; and a pulse width modulation (PWM) control circuit operatively coupled to the time slot generation circuit for controlling a plurality of PWM switches of a switching stage of the SIMO switching device in a continuous conduction mode (CCM) of operation. The PWM switches are controlled according to the time slots generated by the time slot generation circuit.

    摘要翻译： 具有高效调节电路的单电感多输出（SIMO）开关器件。 SIMO切换装置包括用于切换通过SIMO切换装置的电感器的电流的多个时分复用（TDM）开关。 多个TDM交换机产生多个输出。 SIMO切换装置还包括可操作地耦合到多个输出的误差计算电路，用于从多个输出中确定计算出的误差; 时隙生成电路，用于根据计算出的误差来控制多个TDM交换机; 以及可操作地耦合到所述时隙产生电路的脉冲宽度调制（PWM）控制电路，用于在连续导通模式（CCM）中控制所述SIMO开关器件的开关级的多个PWM开关。 PWM开关根据时隙发生电路产生的时隙进行控制。

    Methods and systems for designing high resolution analog to digital converters
    10.
    发明授权
    Methods and systems for designing high resolution analog to digital converters 有权
    用于设计高分辨率模数转换器的方法和系统

    公开(公告)号：US07570191B2

    公开(公告)日：2009-08-04

    申请号：US11760778

    申请日：2007-06-10

    申请人： Prakash Easwaran ,  Prasun Kali Bhattacharya ,  Venkatesh Teeka Srinivasa Shetty

    发明人： Prakash Easwaran ,  Prasun Kali Bhattacharya ,  Venkatesh Teeka Srinivasa Shetty

    IPC分类号： H03M1/38

    CPC分类号： H03M1/0604 ,  H03M1/168

    摘要： Methods and systems for designing a high resolution analog to digital converter (ADC) by eliminating the errors in the ADC stages. An error correction architecture and method eliminate the gain error and settling error of the residue amplifier in a pipelined ADC stage. A reference voltage error correction architecture and method eliminate the reference voltage error due to the sampling action in the ADC. The gain error correction method calculates the gain error using an error amplifier and eliminates the gain error at a later stage of the ADC. The reference voltage error correction method calculates the reference voltage error using an ideal reference voltage and corrects the error at a later stage of the ADC. Therefore, the constraints of gain and settling of the residue amplifier is significantly reduced.

    摘要翻译： 通过消除ADC阶段的错误来设计高分辨率模数转换器（ADC）的方法和系统。 错误校正架构和方法消除了流水线ADC阶段的残差放大器的增益误差和稳定误差。 参考电压误差校正架构和方法消除了ADC中采样动作引起的参考电压误差。 增益误差校正方法使用误差放大器计算增益误差，消除ADC后期的增益误差。 参考电压误差校正方法使用理想的参考电压计算参考电压误差，并在ADC后期校正误差。 因此，残差放大器的增益和稳定的约束显着降低。