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公开(公告)号:US10524209B2
公开(公告)日:2019-12-31
申请号:US15692012
申请日:2017-08-31
Inventor: Michel Ayraud , Serge Ramet , Philippe Level
Abstract: A local oscillator device includes an oscillator module including a first inductive element and a capacitive element coupled in parallel with the inductive element. A frequency divider is coupled to the oscillator module for delivering a local oscillator signal. The local oscillator device includes an autotransformer including the first inductive element and two second inductive elements respectively coupled to the terminals of the first inductive element and to two output terminals of the autotransformer, the output terminals being further coupled to input terminals of the frequency divider.
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222.
公开(公告)号:US20190260382A1
公开(公告)日:2019-08-22
申请号:US16269303
申请日:2019-02-06
Applicant: STMicroelectronics (Alps) SAS
Inventor: Laurent Vaccariello
Abstract: An N-bit type charge redistribution analog-to-digital conversion device includes an input terminal configured to receive an input signal and coupled via a line to an output terminal. The output terminal is configured to be coupled to a comparator. The device further includes three reference potential sources of different values and a network of capacitors, where a first terminal of each capacitor is coupled to the line, and where a second terminal of each capacitor is coupled to switching circuit configured for coupling the second terminal of each capacitor to one of the reference potentials.
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公开(公告)号:US20190187218A1
公开(公告)日:2019-06-20
申请号:US16269331
申请日:2019-02-06
Inventor: Vratislav Michal , Michel Ayraud
IPC: G01R31/3835 , G01R31/36 , H03F3/45 , G01R1/30 , H03F1/02
CPC classification number: G01R31/3835 , G01R1/30 , G01R17/02 , G01R31/3646 , H03F1/0205 , H03F3/45179 , H03F3/45183 , H03F2200/129 , H03F2200/261 , H03F2200/471 , H03F2203/45151
Abstract: A circuit includes an amplifier having a first power terminal configured to be coupled to a supply voltage and a second power terminal configured to be coupled to a reference potential. The circuit further includes a first impedance element coupled between a first input terminal of the amplifier and a first output terminal of the amplifier. The circuit additionally includes a second impedance element coupled between the first input terminal and the reference potential. The amplifier is configured to output a first voltage at a second output terminal of the amplifier in response to the supply voltage being greater than an output voltage at the first output terminal of the amplifier. The amplifier is further configured to output a second voltage at the second output terminal of the amplifier in response to the supply voltage being less than the output voltage at the first output terminal of the amplifier.
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公开(公告)号:US20190173426A1
公开(公告)日:2019-06-06
申请号:US16207696
申请日:2018-12-03
Inventor: Benoit MARCHAND , Francois DRUILHE
Abstract: A quartz crystal resonator is connected to an array of switchable capacitors or resistors. The switched actuation of elements of the array is controlled by bits of a control word. At least one of the bits of the control word is controlled by pulse width modulation to effectuate a tuning of the oscillation frequency of the quartz crystal resonator.
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公开(公告)号:US10257917B2
公开(公告)日:2019-04-09
申请号:US15957578
申请日:2018-04-19
Applicant: STMicroelectronics (Alps) SAS , STMicroelectronics S.r.l. , STMicroelectronics Application GmbH
Inventor: Philippe Sirito-Olivier , Giovanni Luca Torrisi , Manuel Gaertner , Fritz Burkhardt
Abstract: The power supply device comprises a supply transistor commanded by a command signal and providing electric power to a lighting module, and a driving means configured to selectively generate, depending on an instruction signal representative of the structure of said at least one lighting module, a first command signal able to command the supply transistor into an ohmic regime, a second command signal able to command the supply transistor into a pulse width modulation regime involving an alternation of ohmic regimes and blocked regimes, and a third command signal able to command the supply transistor into a saturated regime.
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公开(公告)号:US10056923B2
公开(公告)日:2018-08-21
申请号:US15693986
申请日:2017-09-01
Inventor: Julien Saade , Abdelaziz Goulahsen
CPC classification number: H04B1/04 , G06F13/4282 , H04L25/4908
Abstract: The invention relates to a method for serial data transmission, comprising the steps consisting in computing the running disparity (RD) of a bit stream that is being transmitted; when the running disparity reaches a threshold (T), computing a point disparity on a subsequent frame (S) of the stream; if the point disparity has the same sign as the threshold, inverting the states of the bits of the frame in the transmitted bit stream; and inserting into the transmitted bit stream a polarity bit having a state signalling the inversion.
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公开(公告)号:US10021482B2
公开(公告)日:2018-07-10
申请号:US15598100
申请日:2017-05-17
Applicant: STMicroelectronics (Alps) SAS
Inventor: Christian Fraisse , Angelo Nagari
Abstract: An audio device includes an audio amplifier configured to receive an input signal and generate a differential output signal. A first signal combiner circuit is configured to generate a time-convolution signal of an analog current signal and an analog voltage signal. The analog current signal corresponds to a current at the differential output signal, and the analog voltage signal corresponds to a voltage across the differential output signal. A second signal combiner circuit is configured to subtract the generated time-convolution signal from the input signal.
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公开(公告)号:US10003174B1
公开(公告)日:2018-06-19
申请号:US15598113
申请日:2017-05-17
Applicant: STMicroelectronics (Alps) SAS
Inventor: Xavier Branca
Abstract: An optical emitting circuit includes an array of M optical sources distributed in N groups, where N is lower than M. A controller is configured to generate N periodic square wave control signals that are successively mutually phase shifted by pi/N and that all have the same period, and to cyclically activate/deactivate all the optical sources of the N groups using the control signals. The optical emitting circuit is configured so that each group is activated when a corresponding control signal is in its first state and deactivated when the corresponding control signal is in its second state. The number of optical sources in each group and the order of the groups in the sequence of activations/deactivations are chosen so as to generate an optical signal having an amplitude that sinusoidally varies in steps.
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229.
公开(公告)号:US20180080960A1
公开(公告)日:2018-03-22
申请号:US15451495
申请日:2017-03-07
Applicant: STMicroelectronics (Alps) SAS
Inventor: Patrick Almosnino
IPC: G01R19/10 , G05F1/625 , G01R19/165
CPC classification number: G01R19/10 , G01R1/203 , G01R15/09 , G01R19/0092 , G01R19/16533 , G05F1/46 , G05F1/625
Abstract: A first resistor and a second resistor are coupled in series between a voltage source and an active load. When the current drawn by the active load exceeds a current threshold corresponding to a maximum admissible voltage drop across the first resistor, a stabilization current is delivered to the node common to the series coupled first and second resistors in such a way as to stabilize the voltage on the terminals of the active load at a threshold value. In the presence of such a current in excess of the current threshold, the current consumed by the active load is measured from the voltage drop across the second resistor. Conversely, if the current is less than the current threshold, the current consumed by the active load is measured from the voltage drop across the first resistor.
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230.
公开(公告)号:US09917506B2
公开(公告)日:2018-03-13
申请号:US14975138
申请日:2015-12-18
Applicant: STMicroelectronics (Alps) SAS
Inventor: Vratislav Michal
CPC classification number: H02M3/04 , H02M3/156 , H02M3/1588 , H02M2001/0054 , Y02B70/1466 , Y02B70/1491
Abstract: A method and apparatus for detecting a critical duty cycle that maximizes an output power of a boost converter is provided. In the method and apparatus, the boost converter may be operated at or below the critical duty cycle. In the method and apparatus, a first voltage that is a function of an output voltage of a boost converter and voltage drops across a first set of parasitic resistances of the boost converter is detected. A second voltage that is a function voltage drops across a second set of parasitic resistances of the boost converter is also detected. The voltages are compared to determine the critical duty cycle and the boost converter is operated in accordance with a duty cycle that does not exceed the critical duty cycle.
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