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公开(公告)号：US11929102B2
公开(公告)日：2024-03-12
申请号：US17556227
申请日：2021-12-20
Inventor： Hiroshi Yahata , Tadamasa Toma , Tomoki Ogawa
IPC: H04N19/44 , G11B20/10 , G11B27/00 , G11B27/10 , G11B27/28 , G11B27/32 , H04N5/84 , H04N5/85 , H04N7/015 , H04N9/804 , H04N9/82 , H04N9/87 , G11B20/00 , H04N9/16
CPC classification number: G11B27/28 , G11B20/10 , G11B27/105 , G11B27/329 , H04N5/84 , H04N5/85 , H04N7/015 , H04N9/8042 , H04N9/8205 , H04N9/8233 , G11B2220/2541 , G11B2220/2562
Abstract: A decoding system decodes a video stream, which is encoded video information. The decoding system includes a decoder that acquires the video steam and generates decoded video information, a maximum luminance information acquirer that acquires maximum luminance information indicating the maximum luminance of the video stream from the video stream, and an outputter that outputs the decoded video information along with the maximum luminance information. In in a case where the video stream includes a base video stream and an enhanced video stream, the decoder generates base video information by decoding the base video stream, an enhanced video information by decoding the enhanced video stream, and generates the decoded video information based on the base video information and the enhanced video information, and the outputter outputs the decoded video information, along with the maximum luminance information.
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公开(公告)号：US11917150B2
公开(公告)日：2024-02-27
申请号：US17728284
申请日：2022-04-25
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/119 , H04N19/176 , H04N19/137 , H04N19/52
CPC classification number: H04N19/119 , H04N19/137 , H04N19/176 , H04N19/52
Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
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公开(公告)号：US11909998B2
公开(公告)日：2024-02-20
申请号：US16906993
申请日：2020-06-19
Inventor： Che-Wei Kuo , JIng Ya Li , Chong Soon Lim , Han Boon Teo , Hai Wei Sun , Rohith Mars , Tadamasa Toma , Takahiro Nishi , Kiyofumi Abe , Yusuke Kato
IPC: H04N19/50 , H04N19/124 , H04N19/176 , H04N19/186 , H04N19/96
CPC classification number: H04N19/50 , H04N19/124 , H04N19/176 , H04N19/186 , H04N19/96
Abstract: An encoder includes circuitry and memory. The circuitry determines whether a first virtual pipeline decoding unit (VPDU) is split into smaller blocks and whether a second VPDU is split into smaller blocks. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is split into smaller blocks, a block of chroma samples is predicted without using luma samples. In response to a determination the first VPDU is split into smaller blocks and a determination the second VPDU is split into smaller blocks, the block of chroma samples is predicted using luma samples. In response to a determination the first VPDU is not split into smaller blocks and a determination the second VPDU is not split into smaller block, the block of chroma samples is predicted using luma samples. The block is encoded using the predicted chroma samples.
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公开(公告)号：US11895323B2
公开(公告)日：2024-02-06
申请号：US18058057
申请日：2022-11-22
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N11/02 , H04N19/52 , H04N19/119 , H04N19/176
CPC classification number: H04N19/52 , H04N19/119 , H04N19/176
Abstract: An encoder includes circuitry and memory. Using the memory, the circuitry, in operation, selects an encoding mode from among candidates including a decoder-side motion vector refinement (DMVR) encoding mode and a partition encoding mode. When the DMVR encoding mode is selected, the circuitry: obtains a first motion vector for a first image block; derives a second motion vector from the first motion vector using motion search; and generates a prediction image for the first image block using the second motion vector. When the partition encoding mode is selected, the circuitry: determines a plurality of partitions in a second image block; obtains a third motion vector for each partition; and generates a prediction image for the second image block using the third motion vector, without deriving a fourth motion vector from the third motion vector using motion search.
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公开(公告)号：US11889078B2
公开(公告)日：2024-01-30
申请号：US17833540
申请日：2022-06-06
Inventor： Chong Soon Lim , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Ru Ling Liao , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/119 , H04N19/159 , H04N19/176 , H04N19/196 , H04N19/96 , H04N19/157 , H04N19/463
CPC classification number: H04N19/119 , H04N19/157 , H04N19/159 , H04N19/176 , H04N19/196 , H04N19/463 , H04N19/96
Abstract: An image encoder/decoder includes circuitry and a memory coupled to the circuitry. When a geometry of a block of a picture satisfies a first condition, the circuitry splits the block of the picture into sub blocks having a first set of geometries. When the geometry of the block does not satisfy the first condition, the circuitry splits the block of the picture into sub blocks having a second set of geometries, the second set of geometries being different from the first set of geometries. The circuitry encodes/decodes the sub blocks of the block.
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Patent Agency Ranking
公开(公告)号：US11889059B2
公开(公告)日：2024-01-30
申请号：US17875965
申请日：2022-07-28
Inventor： Jing Ya Li , Ru Ling Liao , Chong Soon Lim , Han Boon Teo , Hai Wei Sun , Che Wei Kuo , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma
IPC: H04N19/105 , H04N19/136 , H04N19/159 , H04N19/176 , H04N19/52 , H04N19/80
CPC classification number: H04N19/105 , H04N19/136 , H04N19/159 , H04N19/176 , H04N19/52 , H04N19/80
Abstract: An encoder includes circuitry and memory connected to the circuitry. The circuitry: derives an absolute value of a sum of horizontal gradient values; derives, as a first parameter, the total sum of the absolute values of horizontal gradient values; derives, as a second parameter, the total sum of the absolute values of vertical gradient values; derives a horizontal-related pixel difference value; derives, as a third parameter, the total sum of the absolute values of horizontal-related pixel difference values; derives a vertical-related pixel difference value; derives, as a fourth parameter, the total sum of the absolute values of vertical-related pixel difference values; and generates a prediction image using the first to fourth parameters.
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公开(公告)号：US11882279B2
公开(公告)日：2024-01-23
申请号：US17725106
申请日：2022-04-20
Inventor： Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Ryuichi Kanoh , Chong Soon Lim , Ru Ling Liao , Hai Wei Sun , Sughosh Pavan Shashidhar , Han Boon Teo , Jing Ya Li
IPC: H04N19/52 , H04N19/119 , H04N19/137 , H04N19/176
CPC classification number: H04N19/119 , H04N19/137 , H04N19/176 , H04N19/52
Abstract: Provided is an encoder which includes circuitry and memory. Using the memory, the circuitry splits an image block into a plurality of partitions, obtains a prediction image for a partition, and encodes the image block using the prediction image. When the partition is not a non-rectangular partition, the circuitry obtains (i) a first prediction image for the partition, (ii) a gradient image for the first prediction image, and (iii) a second prediction image as the prediction image using the first prediction image and the gradient image. When the partition is a non-rectangular partition, the circuitry obtains the first prediction image as the prediction image without using the gradient image.
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公开(公告)号：US11877009B2
公开(公告)日：2024-01-16
申请号：US17727299
申请日：2022-04-22
Inventor： Jing Ya Li , Che Wei Kuo , Chong Soon Lim , Chu Tong Wang , Han Boon Teo , Hai Wei Sun , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Yusuke Kato
IPC: H04N19/66 , H04N19/122 , H04N19/176 , H04N19/103 , H04N19/96
CPC classification number: H04N19/66 , H04N19/122 , H04N19/176 , H04N19/103 , H04N19/96
Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
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公开(公告)号：US11856193B2
公开(公告)日：2023-12-26
申请号：US18150023
申请日：2023-01-04
Inventor： Ryuichi Kanoh , Takahiro Nishi , Tadamasa Toma , Kiyofumi Abe
IPC: H04N19/117 , H04N19/146 , H04N19/176
CPC classification number: H04N19/117 , H04N19/146 , H04N19/176
Abstract: A decoder comprises circuitry and memory. The circuitry, using the memory, in operation, determines a number of first pixels and a number of second pixels used in a deblocking filter process, wherein the first pixels are located at an upper side of a block boundary and the second pixels are located at a lower side of the block boundary, and performs the deblocking filter process on the block boundary. The number of the first pixels and the number of the second pixels are selected from among candidates, wherein the candidates include at least 4 and M larger than 4. Response to a location of the block boundary being a predetermined location, the number of the first pixels used in the deblocking filter process is limited to be 4.
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公开(公告)号：US11838550B2
公开(公告)日：2023-12-05
申请号：US17723324
申请日：2022-04-18
Inventor： Jing Ya Li , Che Wei Kuo , Chong Soon Lim , Chu Tong Wang , Han Boon Teo , Hai Wei Sun , Kiyofumi Abe , Takahiro Nishi , Tadamasa Toma , Yusuke Kato
IPC: H04N19/66 , H04N19/122 , H04N19/176 , H04N19/103 , H04N19/96
CPC classification number: H04N19/66 , H04N19/122 , H04N19/176 , H04N19/103 , H04N19/96
Abstract: An encoder determines, based on a width and a height of a block, whether or not to disable a prediction mode in which the block is split along a partitioning line defined by a distance and an angle and then prediction is performed; and encodes the block with the prediction mode disabled or not disabled according to a result of the determination on whether or not to disable the prediction mode. Here, the distance is the shortest distance between the center of the block and the partitioning line, and the angle is an angle representing a direction from the center of the block toward the partitioning line in the shortest distance. The encoder determines to disable the prediction mode when (i) a width-to-height ratio is at least 8 or (ii) a height-to-width ratio is at least 8.
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