公开(公告)号：US07663146B2

公开(公告)日：2010-02-16

申请号：US10028778

申请日：2001-12-28

Applicant: Hiroaki Tanaka ,  Akira Fujita ,  Shigeru Kimura ,  Akitoshi Maeda ,  Takasuke Hayase

Inventor： Hiroaki Tanaka ,  Akira Fujita ,  Shigeru Kimura ,  Akitoshi Maeda ,  Takasuke Hayase

IPC: G02F1/1343

CPC classification number: H01L29/4908 ,  G02F1/13458 ,  G02F1/136286 ,  G02F2001/13629 ,  G02F2001/136295 ,  H01L29/458

Abstract: An active matrix addressing LCD device having an active matrix substrate on which conductive lines are formed is provided, which suppress the AI hillock without complicating the structure of the lines and which decreases the electrical connection resistance increase at the terminals of the lines, thereby improving the connection reliability. The device comprises an active matrix substrate having a transparent, dielectric plate, thin-film transistors (TFTs) arranged on the plate, and pixel electrodes arranged on the plate. Gate electrodes of the TFTs and scan lines have a first multilevel conductive structure. Common electrodes and common lines may have the first multilevel conductive structure. Source and drain electrodes of the TFTs and signal lines may have a second multilevel conductive structures. Each of the first and second multilevel conductive structures includes a three-level TiN/Ti/Al or TiN/Al/Ti structure or a four-level TiN/Ti/AI/Ti structure. Each of the TiN film of the first and second structures has a nitrogen concentration of 25 atomic % or higher. The Al file may be replaced with an Al alloy.

Abstract translation: 提供了一种有源矩阵寻址LCD器件，其具有形成有导电线的有源矩阵基板，其抑制了AI小丘，而不会使线的结构复杂化，并且降低了线路端子处的电连接电阻增加，从而改善了 连接可靠性。 该器件包括具有透明电介质板，布置在板上的薄膜晶体管（TFT）和布置在板上的像素电极的有源矩阵基板。 TFT和扫描线的栅极具有第一多层导电结构。 公共电极和公共线可以具有第一多层导电结构。 TFT和信号线的源极和漏极可以具有第二多层导电结构。 第一和第二多层导电结构中的每一个包括三级TiN / Ti / Al或TiN / Al / Ti结构或四级TiN / Ti / Al / Ti结构。 第一和第二结构的TiN膜的氮浓度为25原子％以上。 Al文件可以用Al合金代替。

公开(公告)号：US20090310078A1

公开(公告)日：2009-12-17

申请号：US12542812

申请日：2009-08-18

Applicant: Takayuki KONNO ,  Satoshi INADA ,  Yoshiro KITAGAWA ,  Shinichi NISHIDA

Inventor： Takayuki KONNO ,  Satoshi INADA ,  Yoshiro KITAGAWA ,  Shinichi NISHIDA

IPC: G02F1/1345

CPC classification number: G02F1/134363 ,  G02F1/1345

Abstract: Disclosed is a liquid crystal display device that includes a TFT substrate. A plurality of gate lines and a plurality of common lines extend in a first direction on the TFT substrate. Drain lines extend in a second direction substantially perpendicularly to these lines. Bus lines are located outside a display area and are extending parallel to the drain lines. Common line terminals are provided on either side of each block that is constituted by a predetermined number of gate terminals. The common line terminals and the lead lines therefor are formed on the same layer as the drain lines and are connected to the bus lines on the same layer without any contacts being used. Resistance along the routes taken by common lines can be reduced.

Abstract translation: 公开了一种包括TFT基板的液晶显示装置。 多个栅极线和多个公共线在TFT基板上沿第一方向延伸。 排水线在大致垂直于这些线的第二方向上延伸。 总线位于显示区域外部并且平行于排出线延伸。 公共端子设置在由预定数量的栅极端子构成的每个块的任一侧上。 公共线端子及其引线形成在与漏极线相同的层上，并且在相同层上连接到总线，而不使用任何接触。 可以减少沿着公共线路路线的电阻。

公开(公告)号：US07633484B2

公开(公告)日：2009-12-15

申请号：US11049462

申请日：2005-02-03

Applicant: Yukihiro Ito

Inventor： Yukihiro Ito

IPC: G09G3/36

CPC classification number: G06F3/0412

Abstract: A display unit includes a display panel having a display screen on which images are displayed, and (b) a touch panel covering the display screen therewith and detecting a touch thereto made by a user. The touch panel detects the touch in accordance with touch-panel drive signals input thereto. The display panel displays images in accordance with display-drive signals input thereto. The touch panel is switched between a first condition in which the touch-panel drive signals are input into the touch panel and a second condition in which the touch panel is electrically open.

Abstract translation: 显示单元包括具有显示图像的显示屏幕的显示面板，以及（b）覆盖显示屏幕的触摸面板，并检测用户进行的触摸。 触摸面板根据输入的触摸面板驱动信号来检测触摸。 显示面板根据输入的显示驱动信号显示图像。 触摸面板在其中触摸面板驱动信号被输入到触摸面板的第一状态和触摸面板电气打开的第二状态之间切换。

公开(公告)号：US20090295699A1

公开(公告)日：2009-12-03

申请号：US12470056

申请日：2009-05-21

Applicant: Takahiro Korenari ,  Kunihiro Shiota ,  Soichi Saito

Inventor： Takahiro Korenari ,  Kunihiro Shiota ,  Soichi Saito

IPC: G09G3/36 ,  H01L29/786 ,  H03K17/00

CPC classification number: H01L27/1214 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78648

Abstract: Off-leak current of a TFT, required for a drive circuit configured with a TFT of a single conductivity type, is realized with simple manufacturing steps. The impurity concentration of a source region and a drain region of a TFT is set between 2*1018 cm−3 and 2*1019 cm−3, whereby off-leak current of the TFT can be sufficiently reduced even in a single gate structure.

Abstract translation: 通过简单的制造步骤实现了具有单导电型TFT的驱动电路所需的TFT的漏电流。 TFT的源极区域和漏极区域的杂质浓度设定在2×1018cm-3到2×1019cm-3之间，由此即使在单个栅极结构中也可以充分降低TFT的漏电流。

公开(公告)号：US20090289257A1

公开(公告)日：2009-11-26

申请号：US12469186

申请日：2009-05-20

Applicant: Hiroshi SAKURAI

Inventor： Hiroshi SAKURAI

IPC: H01L33/00 ,  G03F1/00 ,  H01L21/28

CPC classification number: H01L27/1288 ,  G03F1/36 ,  G03F1/50 ,  H01L27/1214

Abstract: Disclosed are an exposure mask capable of improving uniformity of a resist film thickness of a half film thickness part and reducing a display defect to increase a manufacturing yield, a method of manufacturing a TFT substrate using the exposure mask and a liquid crystal display comprising the TFT substrate manufactured by the method and having no display defect. The exposure mask includes a light-shielding pattern on a transparent substrate in which a gray-tone area is provided to at least a part of the light-shielding pattern, the gray-tone area having an oblong light-shielding pattern having a width of a submarginal resolution of an exposure apparatus and sandwiched between oblong slit-type transmissive patterns having a width of the submarginal resolution, and a light-shielding rate of the gray-tone area is gradually reduced toward a center of the oblong light-shielding pattern from longitudinal ends thereof.

Abstract translation: 公开了能够提高半膜厚部分的抗蚀剂膜厚度的均匀性并减少显示缺陷以提高制造成品率的曝光掩模，使用该曝光掩模的TFT基板的制造方法和包括TFT的液晶显示器 通过该方法制造并且没有显示缺陷的基板。 曝光掩模包括在透明基板上的遮光图案，其中灰色区域被设置在遮光图案的至少一部分上，灰色区域具有长方形遮光图案，其宽度为 曝光装置的小标尺分辨率被夹在长方形狭缝型透射图案之间并且具有下划线分辨率的宽度和灰色区域的遮光率逐渐减小到长椭圆形遮光图案的中心， 其纵向端部。

公开(公告)号：US07619255B2

公开(公告)日：2009-11-17

申请号：US11723600

申请日：2007-03-21

Applicant: Jun Tanaka ,  Hiroshi Kanoh

Inventor： Jun Tanaka ,  Hiroshi Kanoh

IPC: H01L29/15

CPC classification number: H01L29/4908 ,  H01L29/66757

Abstract: A layer-stacked wiring made up of a microcrystalline silicon thin film and a metal thin film is provided which is capable of suppressing an excessive silicide formation reaction between the microcrystalline silicon thin film and metal thin film, thereby preventing peeling of the thin film. In a polycrystalline silicon TFT (Thin Film Transistor) using the layer-stacked wiring, the microcrystalline silicon thin film is so configured that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 60% or more of a film thickness of the microcrystalline silicon thin film amount to 15% or less of total number of crystal grains or that its crystal grains each having a length of the microcrystalline silicon thin film in a direction of a film thickness being 50% or less of a film thickness of the microcrystalline silicon thin film amount to 85% or more of the total number of crystal grains making up the microcrystalline silicon thin film.

Abstract translation: 提供了由微晶硅薄膜和金属薄膜构成的层叠布线，其能够抑制微晶硅薄膜和金属薄膜之间的过度的硅化物形成反应，从而防止薄膜的剥离。 在使用层叠布线的多晶硅TFT（Thin Film Transistor，多晶硅TFT）中，微晶硅薄膜的结构使得其晶粒各自具有薄膜厚度为60％的微晶硅薄膜的长度， 微晶硅薄膜的膜厚更多为15个以下的晶粒总数，或者其晶粒尺寸为50％以下，每个微晶硅薄膜的长度均为50％以下 的微晶硅薄膜的膜厚的总和为构成微晶硅薄膜的晶粒总数的85％以上。

公开(公告)号：US07618881B2

公开(公告)日：2009-11-17

申请号：US11625214

申请日：2007-01-19

Applicant: Tadashi Satou

Inventor： Tadashi Satou

IPC: H01L21/20

CPC classification number: H01L29/78621 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/6675 ,  H01L29/78648

Abstract: A method for forming a thin-film transistor on an insulating substrate includes the steps of: forming a non-single-crystal semiconductor thin film on the insulating substrate; forming a gate insulating film on the non-single-crystal semiconductor thin film; forming a gate electrode including a lower gate electrode and an upper gate electrode on the gate insulating film, the lower gate electrode having a portion that is not covered by the upper gate electrode; forming a source-drain region and an LDD (lightly doped drain) region in the non-single-crystal thin film semiconductor film concurrently by introducing an impurity into the non-single-crystal semiconductor thin film through the gate electrode and the gate insulating film; and etching away an exposed portion of the lower gate electrode by using the upper gate electrode as a mask.

Abstract translation: 在绝缘基板上形成薄膜晶体管的方法包括以下步骤：在绝缘基板上形成非单晶半导体薄膜; 在非单晶半导体薄膜上形成栅极绝缘膜; 在所述栅极绝缘膜上形成包括下栅电极和上栅电极的栅电极，所述下栅电极具有未被所述上栅电极覆盖的部分; 通过栅极电极和栅极绝缘膜将杂质引入到非单晶半导体薄膜中，同时在非单晶薄膜半导体薄膜中形成源极 - 漏极区域和LDD（轻掺杂漏极）区域 ; 并通过使用上部栅电极作为掩模蚀刻掉下部栅电极的露出部分。

公开(公告)号：US07616288B2

公开(公告)日：2009-11-10

申请号：US11037045

申请日：2005-01-19

Applicant: Toshihiko Motomatsu

Inventor： Toshihiko Motomatsu

IPC: G02F1/13 ,  G02F1/1337 ,  G02F1/1339

CPC classification number: G02F1/13392 ,  G02F1/1341 ,  G02F2001/1316 ,  G02F2001/13415

Abstract: Disclosed is a method of manufacturing a liquid crystal display device using a liquid crystal dispensation alignment method which includes steps of: removing inorganic ions and the like by performing a vacuum drying process on substrates after cleaning alignment layers on which a rubbing process has been performed; and removing foreign objects by performing any one of a process for sucking up foreign objects by use of a nozzle having a specialized shape and a process for blasting a gas to which ultrasonic waves have been applied against the foreign objects, before liquid crystal is dispensed. In addition, a temperature at which sealing material is cured completely is lowered in order to inhibit activation (migration) of organic matters and to thereby reduce visible defects such as alignment bright defects.

Abstract translation: 公开了一种使用液晶分配对准方法制造液晶显示装置的方法，该方法包括以下步骤：通过在清洁已进行摩擦处理的取向层之后对基板进行真空干燥处理来除去无机离子等; 并且在分配液晶之前，通过使用具有特殊形状的喷嘴和用于喷射超声波已被施加超声波的气体的方法来吸入异物的方法中的任何一种，从而去除异物。 此外，为了抑制有机物的活化（迁移），降低密封材料完全固化的温度，从而减少可见缺陷如对准光亮缺陷。

公开(公告)号：US20090273752A1

公开(公告)日：2009-11-05

申请号：US12458322

申请日：2009-07-08

Applicant: Shigeru Kimura ,  Akitoshi Maeda ,  Satoshi Doi ,  Takayuki Ishino

Inventor： Shigeru Kimura ,  Akitoshi Maeda ,  Satoshi Doi ,  Takayuki Ishino

IPC: G02F1/1343

CPC classification number: G02F1/136227 ,  G02F1/13439

Abstract: A liquid crystal display is fabricated which has bus wires disposed in a grid shape, switching elements coupled to the bus wires, and pixel electrodes which are disposed on an interlayer insulating film formed by coating and which are coupled with the switching elements. In fabricating the liquid crystal display, when a transparent conductive film is formed on the interlayer insulating film which is formed by coating, the temperature of the substrate is controlled to become 100° C.-170° C. In another embodiment, when the transparent conductive film is formed on the interlayer insulating film in a non-heated condition, an oxygen flow rate ratio is set to 1% or lower, and annealing is performed after forming the film. Thereby, when etching the ITO film on the interlayer insulating film, etching residue is not produced. Further, contact resistance between the ITO film and the lower layer metal can be uniformly decreased, and display defects can be obviated.

Abstract translation: 制造液晶显示器，其具有以栅格形状布置的总线，耦合到母线的开关元件和设置在由涂层形成并与开关元件耦合的层间绝缘膜上的像素电极。 在制造液晶显示器时，当在通过涂布形成的层间绝缘膜上形成透明导电膜时，将基板的温度控制为100℃-170℃。在另一个实施例中，当透明 在非加热状态下在层间绝缘膜上形成导电膜，将氧气流量比设定为1％以下，在形成膜之后进行退火。 因此，当蚀刻层间绝缘膜上的ITO膜时，不会产生蚀刻残留物。 此外，可以均匀地减少ITO膜和下层金属之间的接触电阻，并且可以避免显示缺陷。

公开(公告)号：US07609350B2

公开(公告)日：2009-10-27

申请号：US11523612

申请日：2006-09-20

Applicant: Shingo Saigo ,  Takasuke Hayase ,  Makoto Horinouchi ,  Hideto Motoshima ,  Akitoshi Maeda

Inventor： Shingo Saigo ,  Takasuke Hayase ,  Makoto Horinouchi ,  Hideto Motoshima ,  Akitoshi Maeda

IPC: G02F1/1343

CPC classification number: G02F1/134363 ,  G02F1/133345 ,  G02F1/136227

Abstract: A display portion is divided by scan lines and signal lines into sections where pixels are provided. Contact holes each for connecting common wiring and a common electrode together are not formed for all the pixels, but decimated so as to be arranged in zigzags.

Abstract translation: 显示部分被扫描线和信号线划分成设置像素的部分。 对于所有像素，不形成用于将公共布线和公共电极连接在一起的接触孔，而是以Z字形排列。