公开(公告)号：US20240426381A1

公开(公告)日：2024-12-26

申请号：US18745241

申请日：2024-06-17

Applicant: ASM IP Holding B.V.

Inventor： Mandar Deshpande ,  Senthil Arasu Subas Chandra Bose ,  Samer Banna

IPC: F16K3/02

Abstract: Thermal breaks and/or gaps between portions of interfacing surfaces of two chambers reduce heat transfer between the chambers. An interface surface (e.g., of a gate valve) includes (i) a base surface; (ii) a raised ring surface extending outward beyond the base surface, wherein the raised ring surface extends around a gate valve access opening; (iii) a seal support surface extending around the raised ring surface; and (iv) at least one raised boss surface extending outward beyond the base surface. The interface surface defines an outer perimeter having a total interface area. The raised ring surface and raised boss surface(s) define at least a portion of a total contacting surface area of the interface surface that is spaced outward from the base surface. The total contacting surface area of the interface surface is less than 10% of the total interface area and/or less than 10% of the base surface's surface area.

公开(公告)号：US20240425984A1

公开(公告)日：2024-12-26

申请号：US18748983

申请日：2024-06-20

Applicant: ASM IP Holding B.V.

Inventor： Dieter Pierreux ,  Quentin Nikitas Nicolas Lionel Eric Tricas ,  Werner Knaepen ,  Alessandro Viva

IPC: C23C16/455 ,  C23C16/44 ,  C23C16/52

Abstract: A method of forming a layer of a material on one or more substrates by ALD is disclosed. Embodiments of the presently described method comprise performing a plurality of deposition cycles comprising at least two precursors pulses with intervening purge pulses to form the layer of the material on the one or more substrates. During each deposition cycle, a ratio of the process chamber pressure during each precursor pulse of the at least two precursor pulses to the process chamber pressure during an intervening purge pulse is equal or different from one another.

公开(公告)号：US12173404B2

公开(公告)日：2024-12-24

申请号：US17184290

申请日：2021-02-24

Applicant: ASM IP Holding B.V.

Inventor： Amir Kajbafvala ,  Caleb Miskin

IPC: C23C16/455 ,  C23C16/24 ,  C23C16/42 ,  C23C16/44 ,  C23C16/52 ,  C23C16/56 ,  H01L21/02

Abstract: A method of depositing one or more epitaxial material layers, a device structure formed using the method and a system for performing the method are disclosed. Exemplary methods include coating a surface of a reaction chamber with a precoat material, processing a number of substrates, and then cleaning the reaction chamber.

公开(公告)号：US20240419068A1

公开(公告)日：2024-12-19

申请号：US18740139

申请日：2024-06-11

Applicant: ASM IP Holding B.V.

Inventor： Daniele Piumi ,  David Kurt de Roest ,  Joäo Antunes Afonso ,  Steaphan Mark Wallace ,  Yoann Tomczak ,  Renè Henricus Jozef Vervuurt

IPC: G03F7/00 ,  G03F7/004 ,  G03F7/11 ,  G03F7/16

Abstract: Structures and related systems and methods for dose reduction in extreme ultraviolet (EUV) lithography. The structures can comprise a dose reducing layer, an adhesion layer, and a resist.

公开(公告)号：US12169361B2

公开(公告)日：2024-12-17

申请号：US16931275

申请日：2020-07-16

Applicant: ASM IP Holding B.V.

Inventor： Ivo Raaijmakers ,  Daniele Piumi ,  Ivan Zyulkov ,  David Kurt de Roest ,  Michael Eugene Givens

IPC: H01L21/311 ,  G03F7/16

Abstract: A substrate processing method and apparatus to create a sacrificial masking layer is disclosed. The layer is created by providing a first precursor selected to react with one of a radiation modified and unmodified layer portion and to not react with the other one of the radiation modified and unmodified layer portion on a substrate in a reaction chamber to selectively grow the sacrificial masking layer.

公开(公告)号：US20240401192A1

公开(公告)日：2024-12-05

申请号：US18675851

申请日：2024-05-28

Applicant: ASM IP Holding B.V.

Inventor： Eric James Shero ,  Paul Ma ,  Jereld Lee Winkler ,  Todd Robert Dunn ,  Shuaidi Zhang ,  Jacqueline Wrench ,  Shubham Garg ,  Jonathan Bakke

IPC: C23C16/448 ,  C23C16/455 ,  C23C16/52

Abstract: Various examples of the present disclosure relate to methods, systems, and apparatus for coupling a delivery vessel disposed at a first location on a substrate processing platform to a remote refill vessel disposed in a second location remote from the substrate processing platform, storing a chemical in the remote refill vessel in a first phase, changing the chemical in the remote refill vessel to a second phase, transporting the chemical in the second phase, to the delivery vessel, maintaining a temperature gradient within an inner volume of the delivery vessel, and returning the chemical to the first phase within the inner volume.

公开(公告)号：US20240395586A1

公开(公告)日：2024-11-28

申请号：US18672416

申请日：2024-05-23

Applicant: ASM IP Holding B.V.

Inventor： Adriaan Garssen

IPC: H01L21/673 ,  B25J15/06 ,  H01L21/02 ,  H01L21/687

Abstract: A wafer handling assembly, a semiconductor processing apparatus comprising the wafer handling assembly and a method of forming a layer on a plurality of wafers is disclosed. Embodiments of the described wafer handling assembly comprise a boat having three boat supports per wafer for supporting the wafer in the boat and an end effector comprising three end effector supports for supporting a wafer on the end effector.

公开(公告)号：US12154785B2

公开(公告)日：2024-11-26

申请号：US17814161

申请日：2022-07-21

Applicant: ASM IP HOLDING B.V.

Inventor： Suvi P. Haukka ,  Elina Färm ,  Raija H. Matero ,  Eva E. Tois ,  Hidemi Suemori ,  Antti Juhani Niskanen ,  Sung-Hoon Jung ,  Petri Räisänen

IPC: H01L21/02 ,  C23C16/04 ,  C23C16/40 ,  C23C16/455

Abstract: Methods are provided herein for deposition of oxide films. Oxide films may be deposited, including selective deposition of oxide thin films on a first surface of a substrate relative to a second, different surface of the same substrate. For example, an oxide thin film such as an insulating metal oxide thin film may be selectively deposited on a first surface of a substrate relative to a second, different surface of the same substrate. The second, different surface may be an organic passivation layer.

公开(公告)号：US20240379347A1

公开(公告)日：2024-11-14

申请号：US18656799

申请日：2024-05-07

Applicant: ASM IP Holding B.V.

Inventor： Mikko Ruoho ,  Eva E. Tois ,  Viljami J. Pore ,  Marko Tuominen

IPC: H01L21/02 ,  C23C16/02 ,  C23C16/34 ,  C23C16/44 ,  C23C16/455 ,  C23C16/50 ,  H01J37/32

Abstract: The present disclosure relates to methods and systems for selectively depositing a material comprising silicon and nitrogen onto a substrate comprising a first surface and a second surface, wherein the deposition occurs on the first surface of the substrate more so than on the second surface of the substrate. More specifically, the methods and systems comprise exposing a substrate that comprises a first surface and a second surface to a source of chlorine and a source of silicon, then exposing the substrate to a source of nitrogen to selectively deposit a material comprising silicon and nitrogen on the first surface of the substrate.

公开(公告)号：US12125722B2

公开(公告)日：2024-10-22

申请号：US17351592

申请日：2021-06-18

Applicant: ASM IP HOLDING B.V.

Inventor： Yukihiro Mori

IPC: H01L21/67 ,  H01L21/66 ,  G02F1/13

CPC classification number: H01L21/6719 ,  H01L21/67167 ,  H01L22/20 ,  G02F1/1303

Abstract: A vacuum process module has a pre-shaped ceiling and/or bottom that is shaped to bulge outwards. The shape of the ceiling and/or process modules counteracts deformation caused by vacuum pressures and/or high temperatures when processing substrates in the process module. The process module may have a side openable to a transfer chamber and an opposite side opposite the openable side. The bulge may be asymmetric, with the peak of the bulge off-center on the ceiling and closer to the opposite side than to the openable side. A rigid structure may be mounted on the ceiling to adjust the magnitude of the bulge in the ceiling. The beam may be, e.g., a rigid beam having an adjustable lift mechanism for lifting up an attached part of the ceiling. The process module may accommodate a plurality of substrates for processing, with each substrate occupying a dedicated stage in the process module.