Abstract:
An organic light emitting display and method of fabricating thereof, the display including a substrate including a first thin film transistor region and a second thin film transistor region; a buffer layer on the substrate; a first and a second semiconductor layer on the buffer layer; a gate insulating layer on the substrate; gate electrodes on the gate insulating layer and corresponding to the first semiconductor layer and the second semiconductor layer, respectively; source/drain electrodes insulated from the gate electrode and being connected to the first semiconductor layer and the second semiconductor layer, respectively; an insulating layer on the substrate; a first electrode connected to the source/drain electrode electrically connected to the first semiconductor layer; an organic layer on the first electrode; and a second electrode on the organic layer, wherein portions of the buffer layer corresponding to a source/drain region of the first semiconductor layer include a metal catalyst.
Abstract:
The described technology relates generally to a thin film transistor comprising a gate electrode, a semiconductor layer and source/drain electrode, wherein the source/drain electrode is disposed in a range of a region in which the semiconductor layer is formed. Therefore, the present embodiments can provide a thin film transistor in which reliability is excellent because a change amount of threshold voltage is small.
Abstract:
A thin film transistor (TFT) and an organic light emitting display device having the same are disclosed. In one embodiment, a TFT includes a gate electrode formed on a substrate. A gate insulating layer is formed on the substrate having the gate electrode. An active layer is formed on the gate insulating layer. A source electrode is formed over the active layer. A drain electrode is formed to substantially surround at least three surfaces of the source electrode on the active layer.
Abstract:
An OLED display includes a first polysilicon layer pattern on a substrate having a first gate electrode, a second gate electrode, and a first capacitor electrode, a gate insulating layer pattern, a second polysilicon layer pattern including a first active layer, a second active layer, and a capacitor polycrystalline dummy layer, a third amorphous silicon layer pattern including first source and drain resistant contact layers on a predetermined region of the first active layer, second source and drain resistant contact layers on a predetermined region of the second active layer, and a capacitor amorphous dummy layer on the capacitor polycrystalline dummy layer, and a data metal layer pattern including first source/drain electrodes, second source/drain electrodes, and a second capacitor electrode.
Abstract:
A thin film transistor (TFT) having an active layer pattern, the active layer pattern including a first active layer pattern extending in a first direction; a second active layer pattern extending in the first direction and parallel to the first active layer pattern; and a third active layer pattern connecting a first end of the first active layer pattern to a first end of the second active layer pattern.
Abstract:
An OLED display includes a first polysilicon layer pattern on a substrate having a first gate electrode, a second gate electrode, and a first capacitor electrode, a gate insulating layer pattern, a second polysilicon layer pattern including a first active layer, a second active layer, and a capacitor polycrystalline dummy layer, a third amorphous silicon layer pattern including first source and drain resistant contact layers on a predetermined region of the first active layer, second source and drain resistant contact layers on a predetermined region of the second active layer, and a capacitor amorphous dummy layer on the capacitor polycrystalline dummy layer, and a data metal layer pattern including first source/drain electrodes, second source/drain electrodes, and a second capacitor electrode.
Abstract:
A thin film transistor substrate that includes a substrate, first and second gate electrodes that are formed on the substrate, a gate insulating layer that is formed on the first and second gate electrodes, a first semiconductor and a second semiconductor that are formed on the gate insulating layer, and that overlap the first gate electrode and the second gate electrode, respectively, a first source electrode and a first drain electrode that are formed on the first semiconductor, and positioned opposed to and spaced from each other, a source electrode connected to the first drain electrode and a second drain electrode positioned opposed to and spaced from the second source electrode, wherein the second source and second drain electrodes are formed on the second semiconductor, and a pixel electrode that is electrically connected to the second drain electrode, a method of manufacturing the same, and a display apparatus having the same.
Abstract:
The present invention provides a phase transition method of an amorphous material, comprising steps of: depositing the amorphous material on a dielectric substrate; forming a cap layer on the amorphous material; depositing a metal on the cap layer; and crystallizing the amorphous material. According to the present invention, the surface of the amorphous material is protected by the cap layer, so that clean surface can be obtained and the roughness of the surface can be remarkably reduced during thermal process and sample handling. In addition, the cap layer is disposed between the amorphous material and the metal to diffuse the metal, so that the metal contamination due to the direct contact of the metal and the amorphous material in the conventional method can be remarkably reduced.
Abstract:
The present invention provides a phase transition method of an amorphous material, comprising steps of: depositing the amorphous material on a dielectric substrate; forming a cap layer on the amorphous material; depositing a metal on the cap layer; and crystallizing the amorphous material. According to the present invention, the surface of the amorphous material is protected by the cap layer, so that clean surface can be obtained and the roughness of the surface can be remarkably reduced during thermal process and sample handling. In addition, the cap layer is disposed between the amorphous material and the metal to diffuse the metal, so that the metal contamination due to the direct contact of the metal and the amorphous material in the conventional method can be remarkably reduced.