中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

58 records (took 0.017 seconds)

    Method for forming fine patterns of a semiconductor device using a double patterning process
    21.
    发明申请
    Method for forming fine patterns of a semiconductor device using a double patterning process 失效
    使用双重图案形成工艺形成半导体器件的精细图案的方法

    公开(公告)号：US20080124931A1

    公开(公告)日：2008-05-29

    申请号：US11978718

    申请日：2007-10-30

    Applicant: Doo-youl Lee ,  Pan-suk Kwak ,  Sung-gon Jung ,  Jung-hyeon Lee ,  Suk-joo Lee ,  Cha-won Koh ,  Ji-young Lee

    Inventor： Doo-youl Lee ,  Pan-suk Kwak ,  Sung-gon Jung ,  Jung-hyeon Lee ,  Suk-joo Lee ,  Cha-won Koh ,  Ji-young Lee

    IPC: H01L21/302

    CPC classification number: H01L21/0332 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76838

    Abstract: A method for forming fine patterns of a semiconductor device includes forming an etching film on a substrate having first and second areas, forming first mask patterns on the substrate to have a first pattern density in the first area and a second pattern density in the second area, forming first capping patterns between the first mask patterns, forming second capping patterns between the first mask patterns, such that recess areas are formed between second capping patterns, and such that a first etching pattern is defined to include the first and second capping patterns, forming second mask patterns in the recess areas to include the first and second mask patterns, removing one of the first and second etching patterns, such that a single etching pattern is remaining on the substrate, and etching the etching film using the remaining etching pattern as an etch mask to form etching film patterns.

    Abstract translation: 用于形成半导体器件的精细图案的方法包括在具有第一和第二区域的衬底上形成蚀刻膜，在衬底上形成第一掩模图案以在第一区域中具有第一图案密度，在第二区域中形成第二图案密度 在所述第一掩模图案之间形成第一封盖图案，在所述第一掩模图案之间形成第二封盖图案，使得在第二封盖图案之间形成凹陷区域，并且使得第一蚀刻图案被限定为包括所述第一和第二封盖图案， 在凹陷区域中形成第二掩模图案以包括第一和第二掩模图案，去除第一和第二蚀刻图案中的一个，使得在基板上残留单个蚀刻图案，并使用剩余的蚀刻图案蚀刻蚀刻膜作为 蚀刻掩模以形成蚀刻膜图案。

    Methods of forming semiconductor solar cells having front surface electrodes
    26.
    发明授权
    Methods of forming semiconductor solar cells having front surface electrodes 失效
    形成具有前表面电极的半导体太阳能电池的方法

    公开(公告)号：US07964499B2

    公开(公告)日：2011-06-21

    申请号：US12437595

    申请日：2009-05-08

    Applicant: Yun-Gi Kim ,  Sang-Ho Kim ,  Doo-Youl Lee

    Inventor： Yun-Gi Kim ,  Sang-Ho Kim ,  Doo-Youl Lee

    IPC: H01L21/44 ,  H01L31/00

    CPC classification number: H01L31/03529 ,  H01L31/022441 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/03762 ,  H01L31/068 ,  H01L31/0747 ,  Y02E10/547

    Abstract: Solar cells include a substrate having a light collecting surface thereon and a P-N rectifying junction within the substrate. The P-N rectifying junction includes a base region of first conductivity type (e.g., p-type) and a semiconductor layer of second conductivity type extending between the base region and the light collecting surface. A trench is also provided, which extends through the semiconductor layer and into the base region. First and second electrodes are provided adjacent the light collecting surface. The first electrode is electrically coupled to the semiconductor layer and the second electrode is electrically coupled to the base region, at a location adjacent a bottom of the trench.

    Abstract translation: 太阳能电池包括其上具有聚光面的基板和在基板内的P-N整流结。 P-N整流结包括第一导电类型的基极区域（例如，p型）和在基极区域和光收集表面之间延伸的第二导电类型的半导体层。 还提供了一个沟槽，其延伸穿过半导体层并进入基极区域。 第一电极和第二电极邻近集光表面设置。 第一电极电耦合到半导体层，并且第二电极在邻近沟槽底部的位置处电耦合到基极区域。

    Method for forming fine patterns of a semiconductor device using a double patterning process
    27.
    发明授权
    Method for forming fine patterns of a semiconductor device using a double patterning process 失效
    使用双重图案形成工艺形成半导体器件的精细图案的方法

    公开(公告)号：US07892982B2

    公开(公告)日：2011-02-22

    申请号：US11978718

    申请日：2007-10-30

    Applicant: Doo-youl Lee ,  Pan-suk Kwak ,  Sung-gon Jung ,  Jung-hyeon Lee ,  Suk-joo Lee ,  Cha-won Koh ,  Ji-young Lee

    Inventor： Doo-youl Lee ,  Pan-suk Kwak ,  Sung-gon Jung ,  Jung-hyeon Lee ,  Suk-joo Lee ,  Cha-won Koh ,  Ji-young Lee

    IPC: H01L21/302

    CPC classification number: H01L21/0332 ,  H01L21/0337 ,  H01L21/0338 ,  H01L21/31144 ,  H01L21/76816 ,  H01L21/76838

    Abstract: A method for forming fine patterns of a semiconductor device includes forming an etching film on a substrate having first and second areas, forming first mask patterns on the substrate to have a first pattern density in the first area and a second pattern density in the second area, forming first capping patterns between the first mask patterns, forming second capping patterns between the first mask patterns, such that recess areas are formed between second capping patterns, and such that a first etching pattern is defined to include the first and second capping patterns, forming second mask patterns in the recess areas to include the first and second mask patterns, removing one of the first and second etching patterns, such that a single etching pattern is remaining on the substrate, and etching the etching film using the remaining etching pattern as an etch mask to form etching film patterns.

    Abstract translation: 用于形成半导体器件的精细图案的方法包括在具有第一和第二区域的衬底上形成蚀刻膜，在衬底上形成第一掩模图案以在第一区域中具有第一图案密度，在第二区域中形成第二图案密度 在所述第一掩模图案之间形成第一封盖图案，在所述第一掩模图案之间形成第二封盖图案，使得在第二封盖图案之间形成凹陷区域，并且使得第一蚀刻图案被限定为包括所述第一和第二封盖图案， 在凹陷区域中形成第二掩模图案以包括第一和第二掩模图案，去除第一和第二蚀刻图案中的一个，使得在基板上残留单个蚀刻图案，并使用剩余的蚀刻图案蚀刻蚀刻膜作为 蚀刻掩模以形成蚀刻膜图案。

    Method of forming a fine pattern of a semiconductor device using a resist reflow measurement key
    28.
    发明授权
    Method of forming a fine pattern of a semiconductor device using a resist reflow measurement key 失效
    使用抗蚀剂回流测量键形成半导体器件的精细图案的方法

    公开(公告)号：US07670761B2

    公开(公告)日：2010-03-02

    申请号：US12219214

    申请日：2008-07-17

    Applicant: Doo-youl Lee ,  Gi-sung Yeo ,  Han-ku Cho ,  Jung-hyeon Lee

    Inventor： Doo-youl Lee ,  Gi-sung Yeo ,  Han-ku Cho ,  Jung-hyeon Lee

    IPC: G03F1/00

    CPC classification number: H01L22/34 ,  G03F7/40 ,  H01L21/0273

    Abstract: In a resist reflow measurement key, and method of fabricating a fine pattern of a semiconductor device using the same, the resist reflow measurement key includes a first reflow key including a plurality of first pattern elements each having a first pattern with a first radius of curvature located on a first side of a first center line and a second pattern with a second radius of curvature located on a second side of the first center line, and a second reflow key including a plurality of second pattern elements each having a third pattern with a third radius of curvature located on a first side of a second center line and a fourth pattern with a fourth radius of curvature located on a second side of the second center line, the second reflow key being formed on a same plane of a substrate as the first reflow key.

    Abstract translation: 在抗蚀剂回流测量键和使用其的半导体器件的精细图案的制造方法中，抗蚀剂回流测量键包括第一回流键，该第一回流键包括多个第一图案元素，每个第一图案元素具有第一曲率半径 位于第一中心线的第一侧和位于第一中心线的第二侧上的具有第二曲率半径的第二图案，以及第二回流键，包括多个第二图案元素，每个第二图案元素具有第三图案， 位于第二中心线的第一侧上的第三曲率半径和位于第二中心线的第二侧上的具有第四曲率半径的第四图案，第二回流键形成在与第二中心线相同的基板的同一平面上 首先回流钥匙

    Methods of Forming Semiconductor Solar Cells Having Front Surface Electrodes
    29.
    发明申请
    Methods of Forming Semiconductor Solar Cells Having Front Surface Electrodes 失效
    形成具有前表面电极的半导体太阳能电池的方法

    公开(公告)号：US20090286347A1

    公开(公告)日：2009-11-19

    申请号：US12437595

    申请日：2009-05-08

    Applicant: Yun-Gi Kim ,  Sang-Ho Kim ,  Doo-Youl Lee

    Inventor： Yun-Gi Kim ,  Sang-Ho Kim ,  Doo-Youl Lee

    IPC: H01L31/18 ,  H01L31/0224

    CPC classification number: H01L31/03529 ,  H01L31/022441 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/03762 ,  H01L31/068 ,  H01L31/0747 ,  Y02E10/547

    Abstract: Solar cells include a substrate having a light collecting surface thereon and a P-N rectifying junction within the substrate. The P-N rectifying junction includes a base region of first conductivity type (e.g., p-type) and a semiconductor layer of second conductivity type extending between the base region and the light collecting surface. A trench is also provided, which extends through the semiconductor layer and into the base region. First and second electrodes are provided adjacent the light collecting surface. The first electrode is electrically coupled to the semiconductor layer and the second electrode is electrically coupled to the base region, at a location adjacent a bottom of the trench.

    Abstract translation: 太阳能电池包括其上具有聚光面的基板和在基板内的P-N整流结。 P-N整流结包括第一导电类型的基极区域（例如，p型）和在基极区域和光收集表面之间延伸的第二导电类型的半导体层。 还提供了一个沟槽，其延伸穿过半导体层并进入基极区域。 第一电极和第二电极邻近集光表面设置。 第一电极电耦合到半导体层，并且第二电极在邻近沟槽底部的位置处电耦合到基极区域。

    Semiconductor Solar Cells Having Front Surface Electrodes
    30.
    发明申请
    Semiconductor Solar Cells Having Front Surface Electrodes 审中-公开
    具有前表面电极的半导体太阳能电池

    公开(公告)号：US20090283145A1

    公开(公告)日：2009-11-19

    申请号：US12437583

    申请日：2009-05-08

    Applicant: Yun-Gi Kim ,  Sang-Ho Kim ,  Doo-Youl Lee

    Inventor： Yun-Gi Kim ,  Sang-Ho Kim ,  Doo-Youl Lee

    IPC: H01L31/0256

    CPC classification number: H01L31/03529 ,  H01L31/022441 ,  H01L31/0236 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/03762 ,  H01L31/068 ,  H01L31/0747 ,  Y02E10/547

    Abstract: Solar cells include a substrate having a light collecting surface thereon and a P-N rectifying junction within the substrate. The P-N rectifying junction includes a base region of first conductivity type (e.g., p-type) and a semiconductor layer of second conductivity type extending between the base region and the light collecting surface. A trench is also provided, which extends through the semiconductor layer and into the base region. First and second electrodes are provided adjacent the light collecting surface. The first electrode is electrically coupled to the semiconductor layer and the second electrode is electrically coupled to the base region, at a location adjacent a bottom of the trench.

    Abstract translation: 太阳能电池包括其上具有聚光面的基板和在基板内的P-N整流结。 P-N整流结包括第一导电类型的基极区域（例如，p型）和在基极区域和光收集表面之间延伸的第二导电类型的半导体层。 还提供了一个沟槽，其延伸穿过半导体层并进入基极区域。 第一电极和第二电极邻近集光表面设置。 第一电极电耦合到半导体层，并且第二电极在邻近沟槽底部的位置处电耦合到基极区域。

Patent Agency Ranking