公开(公告)号：US20170279349A1

公开(公告)日：2017-09-28

申请号：US15432621

申请日：2017-02-14

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Samuel H. NORK ,  Edward L. HENDERSON

IPC: H02M3/07

Abstract: Switched capacitor circuit architectures that may enable high efficiency step-up or step-down dc-dc conversion from a primary, fixed supply input voltage using a four-switch switched capacitor topology and a separate auxiliary supply input voltage. The auxiliary supply input voltage can be optimized within the system or chosen from among other readily available supplies in the system to achieve the highest efficiency conversion ratio, without modifying the switch and flying capacitor arrangement. The auxiliary supply input voltage may be applied to other fixed conversion ratio converters to achieve higher efficiency conversion.

公开(公告)号：US09774206B2

公开(公告)日：2017-09-26

申请号：US14245390

申请日：2014-04-04

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Dave Daekyum Kim ,  Robert Jon Milliken

IPC: H02J7/00 ,  H01M10/42

CPC classification number: H02J7/007 ,  H01M2010/4271 ,  H02J7/0016

Abstract: A monitoring device includes an input terminal configured to receive an input signal from a battery system management (BSM); an output terminal configured to output cell parameters used to determine an open cell voltage associated with one of a plurality of cells within the battery stack connected to the monitoring circuit based on the input signal received from the BSM; a processor; and a memory storing executable instructions for causing the processor to: measure a cell voltage associated with the one of the plurality of cells within the battery stack; measure a voltage drop associated with a measured balancing current; calculate the open cell voltage by adjusting the measured cell voltage based on the measured voltage drop; and balance the battery stack based on the calculated open cell voltage, wherein balancing and calculating the open cell voltage are performed concurrently.

公开(公告)号：US20170237574A1

公开(公告)日：2017-08-17

申请号：US15587315

申请日：2017-05-04

Applicant: Linear Technology Corporation

Inventor： Jeffrey Heath ,  David Dwelley

IPC: H04L12/10

CPC classification number: H04B3/56 ,  H02J3/12 ,  H04L12/10 ,  H04L12/40045

Abstract: A PoDL system includes a PSE connected via a wire pair to a PD, where differential data and DC power are transmitted over the same wire pair. Typically, low voltage/current detection and classification routines are required upon every powering up of the system to allow the PD to convey its PoDL requirements to the PSE. Various techniques are described that simplify or obviate such start-up routines or enable increased flexibility for the PoDL system. Such techniques include: ways to specify a particular PD operating voltage; ways to disable the PD's UVLO circuit during such routines; using opposite polarity voltages for the two routines; using voltage limiters or surge protectors to convey the PoDL information; detecting loop resistance; using a PSE memory to store previous results of the routines; and powering the PD communication circuit using the wire pair while the PD load is powered by an alternate power source.

公开(公告)号：US20170194863A1

公开(公告)日：2017-07-06

申请号：US15463200

申请日：2017-03-20

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Jian LI

IPC: H02M3/158 ,  H02M1/08

CPC classification number: H02M3/158 ,  H02M1/08 ,  H02M3/1584 ,  H02M2001/0009 ,  H02M2003/1566

Abstract: A power supply system includes a power source; a load device configured to receive power from the power source; and a power interface device coupled to the power source and the load device and configured to change a first voltage provided by the power source to a second voltage for operating the load device. The power interface device include a main switching converter configured to operate at a first switching frequency and source low frequency current to the load device and an auxiliary switching converter coupled in parallel with the main switching converter and configured to operate at a second and different switching frequency and source fast transient high frequency current to the load device.

公开(公告)号：US09685938B2

公开(公告)日：2017-06-20

申请号：US15019394

申请日：2016-02-09

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Ciaran J. Brennan ,  Mukesh Kumar

IPC: H03K17/00 ,  H03K5/1532 ,  H01L27/088

CPC classification number: H03K5/1532 ,  H01L27/0883

Abstract: A maximum voltage selection circuit may include multiple inputs, each for receiving a different input voltage, an output for delivering the highest of the input voltages, and a voltage selection circuit. The voltage selection circuit may automatically select the input having the largest voltage magnitude, automatically deliver the voltage at the selected input to the output, and not draw quiescent operating current from any of the inputs. For each and every unique combination of two of the multiple inputs, the voltage selection circuit may include an enhancement mode FET with a channel connected in series between a first input of the unique combination of the two inputs and the output; a connection between the gate of the enhancement mode FET and the second input of the unique combination of the two inputs through the channel of a depletion mode FET; an additional enhancement mode FET with a channel connected in series between the second of the unique combination of the two inputs and the output; and a connection between the gate of the additional enhancement mode FET and the first of the unique combination of the two inputs through the channel of an additional depletion mode FET.

公开(公告)号：US09667429B2

公开(公告)日：2017-05-30

申请号：US14705849

申请日：2015-05-06

Applicant: Linear Technology Corporation

Inventor： David Dwelley ,  Jeffrey Heath ,  Heath Stewart ,  Michael Paul

IPC: H04L12/931 ,  H04L12/10 ,  G01R31/04 ,  G06F1/26

CPC classification number: H04L12/10 ,  G01R31/041 ,  G06F1/26 ,  G06F1/266 ,  H04L49/351

Abstract: A PSE includes a PSE controller that performs a handshaking routine with any PDs connected to the data wire pairs and spare wire pairs and applies power to the data wire pairs and spare wire pairs, via a switch, if certain conditions are met. Two different levels of currents are supplied to different terminals of the PSE controller that are connected to the data wire pairs and the spare wire pairs, and the resulting voltages are measured. The voltages are used to determine the PD impedances at the ends of the data wire pairs and spare wire pairs to determine whether a PD is connected to the data wire pair, whether another PD is connected to the spare wire pair, or whether a single PD is connected to both the data wire pairs and the spare wire pairs.

公开(公告)号：US09642200B2

公开(公告)日：2017-05-02

申请号：US15147834

申请日：2016-05-05

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Joshua William Caldwell ,  Dongwon Kwon ,  Lucas Andrew Milner

IPC: H05B37/00 ,  H05B33/08

CPC classification number: H05B33/0842 ,  H05B33/0815

Abstract: A method and system of driving an LED load. There is a power stage that is configured to deliver a level of current indicated by a control signal to the LED load when a PWM signal is ON and stop delivering the level of current when the PWM signal is OFF. There is a feedback circuit that is configured to generate the operating point signal, which causes the power stage to deliver a level of current indicated by the control signal, when the PWM signal is ON. A store and hold circuit is configured to store an information indicative of a level of the operating point signal just after the PWM signal is turned OFF and cause the operating point signal to be at that level just before the PWM signal is turned ON.

公开(公告)号：US09632519B2

公开(公告)日：2017-04-25

申请号：US14706527

申请日：2015-05-07

Applicant: Linear Technology Corporation

Inventor： Amitkumar P. Patel ,  Anthony K. Bonte

IPC: G05F1/56 ,  G05F1/575 ,  G05F1/563 ,  G05F1/59 ,  H02M1/00

CPC classification number: G05F1/575 ,  G05F1/563 ,  G05F1/59 ,  H02M2001/007

Abstract: A driver circuit for a PNP power transistor in an LDO regulator uses a Class AB (push-pull) buffer to supply the necessary base current to an NPN driver transistor, where the NPN driver transistor has its collector connected to the base of the PNP power transistor. A front end circuit of the driver, coupled to drive the Class AB buffer, uses a current diverting transistor, where a first portion of the current is used to control the pull-up transistor in the Class AB buffer, and the remainder of the current is used to control the pull-down transistor in the Class AB buffer, so the driver is very efficient. The portion of the driver circuit between the input of the driver circuit and the base of the NPN driver transistor is an inverting circuit. The driver can properly operate with an input voltage within two diode drops of ground.

公开(公告)号：US09614436B2

公开(公告)日：2017-04-04

申请号：US13963880

申请日：2013-08-09

Applicant: Linear Technology Corporation

Inventor： Jian Li

IPC: G05F1/20 ,  H02M3/156

CPC classification number: H02M3/156 ,  H02M2003/1566

Abstract: A method and a circuit dynamically adjust a frequency of a clock signal that drives the operations of a power converter. The method includes (a) detecting a change from a predetermined value in an output voltage of the power converter; and (b) upon detecting the change, changing the frequency of the clock signal so as to restore the output voltage. The change, such as a load step-up, may be detected by comparing a feedback signal generated from the output voltage and a predetermined threshold voltage. In one implementation, changing the switching frequency is achieved in increasing (e.g., doubling) the frequency of the clock signal, as needed. The frequency of the clock signal need only be changed for a predetermined time period.

公开(公告)号：US20170055236A1

公开(公告)日：2017-02-23

申请号：US15243335

申请日：2016-08-22

Applicant: LINEAR TECHNOLOGY CORPORATION

Inventor： Alain Pierre LEVESQUE ,  Lance Robert DOHERTY ,  Jonathan Noah SIMON ,  William Alan LINDSAY

IPC: H04W56/00 ,  H04L12/26

CPC classification number: H04W56/0015 ,  H04B7/2693 ,  H04J3/0644 ,  H04L43/0817 ,  H04W56/0025 ,  H04W84/22

Abstract: A mesh network system includes a plurality of network nodes, a network manager, and at least one access point. The network nodes communicate wirelessly with each other and the at least one access point of the mesh network system. The network manager manages operation of a wireless mesh network including the nodes and the at least one access point. The at least one access point communicates wirelessly with the network nodes, and provides a gateway between the wireless mesh network and the network manager. The at least one network access point is operative to synchronize its operation timing to an external clock, such as a UPS or UTC clock. Furthermore, in wireless mesh networks including multiple access points, the access points can synchronize their operation timing to each other, and can provide timing information to other access points and nodes in the network.

Abstract translation: 网状网络系统包括多个网络节点，网络管理器和至少一个接入点。 网络节点与网状网络系统的无线通信和至少一个接入点进行通信。 网络管理器管理包括节点和至少一个接入点的无线网状网络的操作。 所述至少一个接入点与所述网络节点进行无线通信，并且在所述无线网状网络和所述网络管理器之间提供网关。 所述至少一个网络接入点用于使其操作时序与诸如UPS或UTC时钟之类的外部时钟同步。 此外，在包括多个接入点的无线网状网络中，接入点可以将其操作时序彼此同步，并且可以向网络中的其他接入点和节点提供定时信息。