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公开(公告)号:US11500621B2
公开(公告)日:2022-11-15
申请号:US16876739
申请日:2020-05-18
Applicant: QUALCOMM TECHNOLOGIES, INC.
Inventor: Richard A. Lethin , Allen K. Leung , Benoit J. Meister , David E. Wohlford
Abstract: Methods, apparatus and computer software product for optimization of data transfer between two memories includes determining access to master data stored in one memory and/or to local data stored in another memory such that either or both of the size of total data transferred and the number of data transfers required to transfer the total data can be minimized. The master and/or local accesses are based on, at least in part, respective structures of the master and local data.
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公开(公告)号:US11481576B2
公开(公告)日:2022-10-25
申请号:US16827592
申请日:2020-03-23
Applicant: QUALCOMM Technologies, Inc.
Inventor: Mert Kilickaya , Efstratios Gavves , Arnold Wilhelmus Maria Smeulders
Abstract: A method for processing an image is presented. The method locates a subject and an object of a subject-object interaction in the image. The method determines relative weights of the subject, the object, and a context region for classification. The method further classifies the subject-object interaction based on a classification of a weighted representation of the subject, a weighted representation of the object, and a weighted representation of the context region.
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公开(公告)号:US20220318590A1
公开(公告)日:2022-10-06
申请号:US17219099
申请日:2021-03-31
Applicant: QUALCOMM Technologies, Inc.
Inventor: Gabriele CESA , Leon LANG , Maurice WEILER
Abstract: A method comprising for generating an equivariant neural network includes receiving a set of irreducible representations for an origin-preserving group. A network that is equivariant to the origin-preserving group is dynamically generated based on the set of irreducible representation.
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公开(公告)号:US20220301304A1
公开(公告)日:2022-09-22
申请号:US17457408
申请日:2021-12-02
Applicant: QUALCOMM Technologies, Inc.
Inventor: Shreyas HAMPALI , Vincent LEPETIT , Clemens ARTH
IPC: G06V20/20 , G06T7/73 , G06V40/10 , G06T9/00 , G06T7/80 , G06T7/50 , G06T19/00 , G06V10/40 , G06V10/82 , G06K9/62 , G06N3/04
Abstract: Systems and techniques are provided for determining one or more poses of one or more objects. For example, a process can include determining, using a machine learning system, a plurality of keypoints from an image. The plurality of keypoints are associated with at least one object in the image. The process can include determining a plurality of features from the machine learning system based on the plurality of keypoints. The process can include classifying the plurality of features into a plurality of joint types. The process can include determining pose parameters for the at least one object based on the plurality of joint types.
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公开(公告)号:US20220156426A1
公开(公告)日:2022-05-19
申请号:US17454020
申请日:2021-11-08
Applicant: QUALCOMM Technologies, Inc.
Inventor: Shreyas HAMPALI , Sinisa STEKOVIC , Friedrich FRAUNDORFER , Vincent LEPETIT
Abstract: Systems and techniques are provided for determining environmental layouts. For example, based on one or more images of an environment and depth information associated with the one or more images, a set of candidate layouts and a set of candidate objects corresponding to the environment can be detected. The set of candidate layouts and set of candidate objects can be organized as a structured tree. For instance, a structured tree can be generated including nodes corresponding to the set of candidate layouts and the set of candidate objects. A combination of objects and layouts can be selected in the structured tree (e.g., based on a search of the structured tree, such as using a Monte-Carlo Tree Search (MCTS) algorithm or adapted MCTS algorithm). A three-dimensional (3D) layout of the environment can be determined based on the combination of objects and layouts in the structured tree.
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公开(公告)号:US20220058872A1
公开(公告)日:2022-02-24
申请号:US17400065
申请日:2021-08-11
Applicant: QUALCOMM Technologies, Inc.
Inventor: Dieter SCHMALSTIEG , Markus STEINBERGER , Daniel MLAKAR
Abstract: The present disclosure relates to methods and apparatus for graphics processing. The apparatus may identify at least one mesh associated with at least one frame. The apparatus may also divide the at least one mesh into a plurality of groups of primitives, each of the plurality of groups of primitives including at least one primitive and a plurality of vertices. The apparatus may also compress the plurality of groups of primitives into a plurality of groups of compressed primitives, the plurality of groups of compressed primitives being associated with random access. Additionally, the apparatus may decompress the plurality of groups of compressed primitives, at least one first group of the plurality of groups of compressed primitives being decompressed in parallel with at least one second group of the plurality of groups of compressed primitives.
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公开(公告)号:US20210248504A1
公开(公告)日:2021-08-12
申请号:US17169338
申请日:2021-02-05
Applicant: QUALCOMM TECHNOLOGIES, INC.
Inventor: Pim DE HAAN , Maurice WEILER , Taco Sebastiaan COHEN , Max WELLING
Abstract: Certain aspects of the present disclosure provide a method for performing machine learning, comprising: determining a plurality of vertices in a neighborhood associated with a mesh including a target vertex; determining a linear transformation configured to parallel transport signals along all edges in the mesh to the target vertex; applying the linear transformation to the plurality of vertices in the neighborhood to form a combined signal at the target vertex; determining a set of basis filters; linearly combining the basis filters using a set of learned parameters to form a gauge equivariant convolution filter, wherein the gauge equivariant convolution filter is constrained to maintain gauge equivariance; applying the gauge equivariant convolution filter to the combined signal to form an intermediate output; and applying a nonlinearity to the intermediate output to form a convolution output.
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公开(公告)号:US20200302232A1
公开(公告)日:2020-09-24
申请号:US16827592
申请日:2020-03-23
Applicant: QUALCOMM Technologies, Inc.
Inventor: Mert KILICKAYA , Efstratios GAVVES , Arnold Wilhelmus Maria SMEULDERS
Abstract: A method for processing an image is presented. The method locates a subject and an object of a subject-object interaction in the image. The method determines relative weights of the subject, the object, and a context region for classification. The method further classifies the subject-object interaction based on a classification of a weighted representation of the subject, a weighted representation of the object, and a weighted representation of the context region.
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公开(公告)号:US10224087B1
公开(公告)日:2019-03-05
申请号:US15849863
申请日:2017-12-21
Inventor: Seong-Ook Jung , Sara Choi , Hong Keun Ahn , Seung Hyuk Kang , Sungryul Kim
Abstract: Sensing voltage based on a supplied to magneto-resistive random access memory (MRAM) bit cells in an MRAM for tracking write operations. Sensing voltage based on supply voltage applied to an MRAM bit cell in a write operation can be used to detect completion of magnetic tunnel junction (MTJ) switching in an MRAM bit cell to terminate the write operation to reduce power and write times. In exemplary aspects provided herein, reference and write operation voltages sensed from the MRAM bit cell in response to the write operation are compared to each other to detect completion of MTJ switching of voltage based on the supply voltage applied to the MRAM bit cell regardless of whether the write operation is logic ‘0’ or logic ‘1’ write operation. This provides a higher sensing margin, because the change in MTJ resistance after MTJ switching completion is larger at the supply voltage rail.
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公开(公告)号:US20180069535A1
公开(公告)日:2018-03-08
申请号:US15259633
申请日:2016-09-08
Applicant: Qualcomm Technologies, Inc.
Inventor: Stanley Seungchul Song , Seong-Ook Jung , Hanwool Jeong , Giridhar Nallapati , Chidi Chidambaram
IPC: H03K3/356 , H03K19/096 , H03K3/037 , H03K3/012
CPC classification number: H03K3/356104 , H03K3/012 , H03K3/017 , H03K3/037 , H03K3/0375 , H03K19/0963
Abstract: Adaptive pulse generation circuits for clocking pulse latches with minimum hold time are provided. In one aspect, an adaptive pulse generation circuit employs a dynamic XOR-based logic gate configured to provide a pulse generation signal based on an XOR-based function of data input and data output-based signals of a pulse latch. A pull-down keeper circuit is configured to pull the pulse generation signal to a ground voltage in response to the pulse generation signal being in an inactive state while the clock signal is in an active state. A logic circuit is configured to generate an adaptive pulse signal to clock a pulse latch in response to the pulse generation signal and the clock signal being in an active state. This configuration results in the pulse width of the adaptive pulse signal corresponding to the input-to-output delay of the pulse latch.
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