摘要:
A parallel computer processor that performs L1 norm calculations includes a plurality of processing elements and a data pipeline which couples the processing elements. The data vectors for which the L1 norm is to be calculated are stored in storage lines of a cache memory. In operation each processing element accesses data in its private storage column in the cache memory and calculates a term signal. The term signals are added to form the resulting L1 norm.
摘要:
A pixel map signal is converted into a coefficient signal of block coefficient signals, each representing the pixels in a pixel map block (420) in a pixel map (410) with the coefficients in a hybrid polynomial. The coefficient signal is quantized by dividing each of the coefficient values in each of the block coefficient signals by quantization factors to produce quantized coefficient values which replace the coefficient values. Block coefficient signals which represent an edge block (424) in the pixel map (410) are divided by larger quantization factors than block coefficient signals which represent a center block (422) in the pixel map (410). As a result, smaller quantized coefficient values are obtained so that block coefficient signals which represent an edge block (424) are compressed to a greater extent than block coefficient signals that represent a center block (422) in the pixel map (410).
摘要:
A method and system for an FIR filter are provided. A sequence of input signal is converted to a corresponding sequence of log signals. FIR filtering coefficients are then added to each log signal to generate a plurality of term signals. The term signals are then converted to inverse-log signals, and the inverse-log signals are summed to produce an output signal. Log/inverse-log conversions of signals are based on estimating a log/inverse-log function using a second-order polynomial.
摘要:
A speech signal is sampled to form a sequence of speech data and segmented into segments. The envelope of each segment is detected to form an envelope segment. Each datum of the segment is divided by each datum of the envelope segment to form a de-envelope segment which is transformed into spectral components. Dominant frequencies are determined for the spectral components with greatest magnitudes. Envelope coefficients are generated by fitting a polynomial function to the segment. Phase parameters are generated representing a phase of each of the dominant spectral components. The dominant frequencies, the envelope coefficients and the phase parameters are generated as compressed speech data for each voiced segment. For each unvoiced segment, a carrier frequency, an amplitude and at least one sideband frequency of an amplitude modulation component are generated as the compressed speech data.
摘要:
A method and system for an IIR filter are provided. A sequence of input signals is converted to a first sequence of log signals, while a sequence of feedback signals is converted to a second sequence of log signals. IIR filtering coefficients are then added to each sequence of log signals to generate a plurality of term signals. The term signals are then converted to inverse-log signals which are summed to produce an output signal. The log/inverse-log conversions of signals are based on estimating a log/inverse-log function using a second-order polynomial.
摘要:
A system (400) alternatively performs real matrix operation in a first mode or performs complex matrix multiplication in a second mode. One input matrix (e.g., {B}) stays in a plurality of memory fields (430-k), while the other input matrix (e.g., {A}) is loaded into a plurality of registers (410-k). Parallel operating groups (405-k, 409-(k+1)) combine elements of {A} with elements of {B}. The groups (405-k, 409-(k+1)) comprise the memory fields (430-k), the registers (410-k) as well as computational units (440-k), switches (420-k) and adder units (460-k). The adder units (460-k) are configured by the switches (420-k) to operate as adders or to operate as accumulators, depending on the mode. Adders provide intermediate results and accumulators accumulate these intermediate results (e.g., Sum) to elements of the resulting matrix {C}. For complex multiplication, real (Re) and imaginary (Im) parts of matrix elements are in processed in adjacent groups. The system (400) uses logarithmic representations of the matrix elements and further comprises a log converter (490) and a plurality of inverse log converters (450-k).
摘要翻译:系统(400)可选地以第一模式执行实矩阵运算或在第二模式中执行复矩阵乘法。 一个输入矩阵(例如{+ E,uns B + EE})停留在多个存储器场(430-k)中,而另一个输入矩阵(例如,{+ E,uns A + EE})被加载到 多个寄存器(410-k)。 并行操作组(405-k,409-(k + 1))将{+ E,uns A + EE}的元素与{+ E,uns B + EE}的元素组合。 组(405-k,409-(k + 1))包括存储器字段(430-k),寄存器(410-k)以及计算单元(440-k),开关(420-k)和 加法器单元(460-k)。 加法器单元(460-k)由开关(420-k)配置,作为加法器运行或者作为累加器运行,这取决于模式。 加法器提供中间结果,并且累加器将这些中间结果(例如,Sum)累积到所得矩阵{+ E,C C + EE}的元素。 对于复数乘法,在相邻组中处理矩阵元素的实数(Re)和虚部(Im)部分。 系统(400)使用矩阵元素的对数表示,并且还包括对数转换器(490)和多个逆对数转换器(450-k)。
摘要:
A parallel processor (110) operates in the LOG domain. A LOG converter (114) receives input data in the NORMAL and converts it to the LOG domain for processing in the parallel processing units PPU-k. Scaling of the input data, is performed in the LOG converter (114) without need for additional multipliers. A constant factor is added to the LOG input data during the LOG conversion process using existing LOG adders already present to perform the LOG conversion. Thus, less total circuitry is needed and the processor can be made more compact, more efficient and less costly.
摘要:
A converter, which may be used for implementing either logarithmic or inverse-logarithmic functions, includes a memory, a multiplier, and an adder. The memory stores a plurality of parameters which are derived using a least squares method to estimate a logarithmic or inverse-logarithmic function over a domain of input values.
摘要:
The invention relates to a method for electronically representing a number V in a binary data word. Both the exponent and the mantissa are represented as 2' complement. The mantissa is normalized to 0.1.F if the number V is positive where F is the fraction of the mantissa. In case that the number V is negative the fraction F is normalized to 10.F. Usage of this format allows to design an improved adder which requires less hardware.
摘要:
A speech signal is sampled to form a sequence of speech data. The sequence of speech data is segmented into overlapping segments. Speech coefficients are generated by fitting each segment to a nonlinear predictive coding equation. The nonlinear predictive coding equation includes a linear predictive coding equation with linear terms, and additionally includes at least one cross term that is proportional to a product of two or more of the linear terms. If the segment is voiced, a sinusoidal term is included in the nonlinear predictive coding equation and sinusoidal parameters are generated. Otherwise, a noise term is included in the nonlinear predictive coding equation. The speech coefficients, a voiced bit, and, if the segment is voiced, the sinusoidal parameters are included as compressed speech data.