公开(公告)号：US20250103371A1

公开(公告)日：2025-03-27

申请号：US18472924

申请日：2023-09-22

Applicant: Advanced Micro Devices, Inc. ,  ATI Technologies ULC

Inventor： JinYun Liu ,  Yinan Jiang ,  HaiJun Chang

IPC: G06F9/455

Abstract: The disclosed computing device can include host circuitry configured to provide a physical function and guest circuitry configured to provide a virtual function. The host circuitry is configured to dynamically assign request identifiers for accessing at least the host circuitry in a manner that allows the request identifiers to change on a command-to-command basis instead of a time-to-time basis that uses fixed value request identifiers in time slices. Various other methods, systems, and computer-readable media are also disclosed.

公开(公告)号：US20240202015A1

公开(公告)日：2024-06-20

申请号：US18066155

申请日：2022-12-14

Applicant: Advanced Micro Devices, Inc ,  ATI Technologies ULC

Inventor： Lu Lu ,  Anthony Asaro ,  Gia Tung Phan ,  Gongxian Cheng ,  Philip Ng ,  Yinan Jiang ,  Felix Kuehling

IPC: G06F9/455 ,  G06F9/54

CPC classification number: G06F9/45545 ,  G06F9/45558 ,  G06F9/545 ,  G06F2009/4557 ,  G06F2009/45579

Abstract: In a computing device, a hardware device (e.g., a parallel accelerated processor or graphics processing unit) is coupled to a bus, such as a peripheral component interconnect express (PCIe) bus. The hardware device supports physical partitioning that allows physical resources of the hardware device to be separated into different partitions. Examples of such physical resources include engine resources (e.g., compute resources, direct memory access resources), memory resources (e.g., random access memory), and so forth. Each physical partition is mapped to a physical function that is exposed to a host on the computing device in a manner that is compliant with the bus protocol, allowing software to access the physical partition in a conventional manner based on the bus protocol.

公开(公告)号：US20240100422A1

公开(公告)日：2024-03-28

申请号：US17955266

申请日：2022-09-28

Applicant: Advanced Micro Devices, Inc ,  ATI Technologies ULC

Inventor： Yinan Jiang ,  HaiJun Chang ,  GuoQing Zhang

IPC: A63F13/335 ,  A63F13/352 ,  A63F13/358

CPC classification number: A63F13/335 ,  A63F13/352 ,  A63F13/358

Abstract: Resource use orchestration for multiple application instances is described. In accordance with the described techniques, a time interval for accessing a resource is divided into multiple time slots. In one or more implementations, the resource is a graphics processing unit. Each of a plurality of containers associated with an application is assigned to one of the multiple time slots according to a disbursement algorithm. A respective signal offset is provided to each container based on an assigned time slot of the container. The provided signal offsets cause the plurality of containers to access the resource for the application in a predetermined order.

公开(公告)号：US20220188139A1

公开(公告)日：2022-06-16

申请号：US17121678

申请日：2020-12-14

Applicant: ATI Technologies ULC

Inventor： Yinan Jiang ,  Kamraan Nasim ,  Dezhi Ming ,  Ahmed M. Abdelkhalek ,  Dmytro Chenchykov ,  Andy Sung

IPC: G06F9/455 ,  G06F9/48

Abstract: A technique for managing access to a micro engine, the method comprising: determining that a virtual function “VF”) is to be given access to direct communication with a micro engine; in response to the determining, configuring the micro engine to accept direct communication from the VF; monitoring for unpermitted communication; and after a time period has expired, configuring the micro engine to no longer accept direct communication from the VF.

公开(公告)号：US11194614B2

公开(公告)日：2021-12-07

申请号：US16591276

申请日：2019-10-02

Applicant: ATI Technologies ULC

Inventor： Yinan Jiang ,  Ahmed M. Abdelkhalek ,  Guopei Qiao ,  Andy Sung ,  Haibo Liu ,  Dezhi Ming ,  Zhidong Xu

IPC: G06F9/455 ,  G06F9/22 ,  G06F9/48

Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.

公开(公告)号：US20190004842A1

公开(公告)日：2019-01-03

申请号：US15639971

申请日：2017-06-30

Applicant: ATI Technologies ULC

Inventor： Yinan Jiang ,  Ahmed M. Abdelkhalek ,  Guopei Qiao ,  Andy Sung ,  Haibo Liu ,  Dezhi Ming ,  Zhidong Xu

IPC: G06F9/455 ,  G06F9/48 ,  G06F9/22

Abstract: A technique for varying firmware for different virtual functions in a virtualized device is provided. The virtualized device includes a hardware accelerator and a microcontroller that executes firmware. The virtualized device is virtualized in that the virtualized device performs work for different virtual functions (with different virtual functions associated with different virtual machines), each function getting a “time-slice” during which work is performed for that function. To vary the firmware, each time the virtualized device switches from performing work for a current virtual function to work for a subsequent virtual function, one or more microcontrollers of the virtualized device examines memory storing addresses for firmware for the subsequent virtual function and begins executing the firmware for that subsequent virtual function. The addresses for the firmware are provided by a corresponding virtual machine at configuration time.

公开(公告)号：US20190004840A1

公开(公告)日：2019-01-03

申请号：US15637810

申请日：2017-06-29

Applicant: ATI Technologies ULC

Inventor： Anthony Asaro ,  Yinan Jiang ,  Kelly Donald Clark Zytaruk

IPC: G06F9/455 ,  G06F9/48 ,  G06F9/38 ,  G06F21/74 ,  G06F13/372

Abstract: A register protection mechanism for a virtualized accelerated processing device (“APD”) is disclosed. The mechanism protects registers of the accelerated processing device designated as physical-function-or-virtual-function registers (“PF-or-VF* registers”), which are single architectural instance registers that are shared among different functions that share the APD in a virtualization scheme whereby each function can maintain a different value in these registers. The protection mechanism for these registers comprises comparing the function associated with the memory address specified by a particular register access request to the “currently active” function for the APD and disallowing the register access request if a match does not occur.

公开(公告)号：US20180113731A1

公开(公告)日：2018-04-26

申请号：US15348225

申请日：2016-11-10

Applicant: ATI Technologies ULC ,  Advanced Micro Devices (Shanghai) Co., LTD.

Inventor： Jeffrey G. Cheng ,  Yinan Jiang ,  Guangwen Yang ,  Kelly Donald Clark Zytaruk ,  LingFei Liu ,  XiaoWei Wang

IPC: G06F9/455 ,  G06T1/20

CPC classification number: G06F9/45558 ,  G06F2009/4557 ,  G06F2009/45575 ,  G06T1/20

Abstract: A request is sent from a new virtual function (VF) to a physical function for requesting the initialization of the new VF. The controlling physical function and the new VF establish a two-way communication channel that to start and end the VF's exclusive accesses to registers in a configuration space. The physical function uses a timing control to monitor that exclusive register access by the new VF is completed within a predetermined time period. The new VF is only granted a predetermined time period of exclusive access to complete its initialization process. If the exclusive access period is timed out, the controlling physical function can terminate the VF to prevent GPU stalls.

公开(公告)号：US20250110930A1

公开(公告)日：2025-04-03

申请号：US18478895

申请日：2023-09-29

Applicant: ATI Technologies ULC

Inventor： Yinan Jiang ,  Dmytro Chenchykov ,  Shaoyun Liu ,  Vignesh Chander

IPC: G06F16/21

Abstract: A computer-implemented method for ensuring processing unit hardware state integrity in live migration can include participating as a source, by a processing unit, in a live migration procedure by injecting, into a live migration data package containing a state of the processing unit, a signature verifying the state. The method can additionally include participating as a target, by the processing unit, in an additional live migration procedure migrating an additional live migration data package containing an additional state of an additional processing unit by performing an integrity check based on an additional signature, in the additional live migration data package, verifying the additional state. Various other methods, systems, and computer-readable media are also disclosed.

公开(公告)号：US12210891B2

公开(公告)日：2025-01-28

申请号：US17126315

申请日：2020-12-18

Applicant: ADVANCED MICRO DEVICES (SHANGHAI) CO., LTD. ,  ATI TECHNOLOGIES ULC

Inventor： Yinan Jiang ,  ZhenYu Min ,  WenWen Tang

IPC: G06F9/455 ,  G06F9/48 ,  G06F11/30 ,  G06F11/34

Abstract: A processing system includes physical function circuitry to execute virtual functions and a processing unit configured to operate in a first mode that allows more than one virtual function to execute on the physical function circuitry and a second mode that constrains the physical function circuitry to executing a single virtual function. A first virtual function modifies a state of the processing unit in response to the processing unit being in the second mode. A host driver executing on the processing unit modifies an operating mode indicator to indicate that the processing unit is operating in the first mode or to indicate that the processing unit is operating in the second mode. Microcode executing on the processing unit accesses the operating mode indicator to determine whether the processing unit is operating in the first mode or the second mode.