公开(公告)号：US20240145357A1

公开(公告)日：2024-05-02

申请号：US18402649

申请日：2024-01-02

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Lin YEH ,  Jen-Chieh KAO

IPC: H01L23/498 ,  H01L23/31 ,  H01L25/00 ,  H01L25/10

CPC classification number: H01L23/49805 ,  H01L23/3121 ,  H01L25/105 ,  H01L25/50

Abstract: The present disclosure provides an electronic assembly including a semiconductor device package. The semiconductor device package includes a first package and a conductive element. The first package includes an electronic component and a protection layer covering the electronic component. The conductive element is supported by the protection layer and electrically connected with the electronic component through an electrical contact. A method for manufacturing a semiconductor device package is also provided in the present disclosure.

公开(公告)号：US20230026633A1

公开(公告)日：2023-01-26

申请号：US17959925

申请日：2022-10-04

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shiu-Fang YEN ,  Chang-Lin YEH ,  Jen-Chieh KAO

IPC: H01L23/367 ,  H01L23/00 ,  H01L23/31 ,  H01L23/373 ,  H01L23/498 ,  H01L23/66 ,  H01L21/48 ,  H01L21/56 ,  H01Q1/38 ,  H01L25/065

Abstract: A semiconductor package device includes a substrate, an electronic component, and a thermal conductive layer. The electronic component is disposed on the substrate and includes a first surface facing away from the substrate. The thermal conductive layer is disposed above the first surface of the electronic component. The thermal conductive layer includes a plurality of portions spaced apart from each other.

公开(公告)号：US20210193545A1

公开(公告)日：2021-06-24

申请号：US16725307

申请日：2019-12-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Sheng-Yu CHEN ,  Chang-Lin YEH ,  Ming-Hung CHEN

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/29 ,  H01L23/538 ,  H01L25/065 ,  H01L21/56

Abstract: A semiconductor package includes a substrate having a first side and a second side opposite to the first side, a first type semiconductor die disposed on the first side of the substrate, a first compound attached to the first side and encapsulating the first type semiconductor die, and a second compound attached to the second side, causing a stress with respect to the first type semiconductor die in the first compound. A method for manufacturing the semiconductor package described herein is also disclosed.

公开(公告)号：US20210066354A1

公开(公告)日：2021-03-04

申请号：US16557990

申请日：2019-08-30

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming-Hung CHEN ,  Yung I. YEH ,  Chang-Lin YEH ,  Sheng-Yu CHEN

IPC: H01L27/12 ,  H01L33/62 ,  H01L33/54 ,  H01L25/075

Abstract: A semiconductor device package includes a main substrate, at least one thin film transistor (TFT) module, at least one first electronic component, at least one encapsulant and a plurality of light emitting devices. The main substrate has a first surface and a second surface opposite to the first surface. The thin film transistor (TFT) module is disposed adjacent to and electrically connected to the first surface of the main substrate. The first electronic component is disposed adjacent to and electrically connected to the first surface of the main substrate. The encapsulant covers the at least one thin film transistor (TFT) module and the at least one first electronic component. The light emitting devices are electrically connected to the at least one thin film transistor (TFT) module.

公开(公告)号：US20210057398A1

公开(公告)日：2021-02-25

申请号：US16550111

申请日：2019-08-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ming-Hung CHEN ,  Sheng-Yu CHEN ,  Chang-Lin YEH ,  Yung-I YEH

IPC: H01L25/16 ,  H01L27/12 ,  H01L23/00 ,  H01L33/56 ,  H01L23/48 ,  H01L23/528 ,  H01L33/62 ,  H01L23/522

Abstract: A semiconductor device package includes a first substrate, a dielectric layer, a thin film transistor (TFT) and an electronic component. The first substrate has a first surface and a second surface opposite to the first surface. The dielectric layer is disposed on the first surface of the first substrate. The dielectric layer has a first surface facing away from the first substrate and a second surface opposite to the first surface. The TFT layer is disposed on the dielectric layer. The electronic component is disposed on the second surface of the first substrate. A roughness of the first surface of the dielectric layer is less than a roughness of the first surface of the first substrate.

公开(公告)号：US20200161200A1

公开(公告)日：2020-05-21

申请号：US16751139

申请日：2020-01-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yi CHEN ,  Chang-Lin YEH ,  Jen-Chieh KAO

IPC: H01L23/31 ,  H01L23/498 ,  H01Q21/06 ,  H01L23/10 ,  H01Q1/22 ,  H01Q13/10 ,  H01L23/00 ,  H01Q19/10 ,  H01L23/66

Abstract: A semiconductor package device includes a first substrate, a second substrate and a first spacer. The first substrate includes a first divided pad. The second substrate includes a second divided pad disposed above the first divided pad. The first spacer is disposed between the first divided pad and the second divided pad. The first spacer is in contact with the first divided pad and the second divided pad.

公开(公告)号：US20190393140A1

公开(公告)日：2019-12-26

申请号：US16268385

申请日：2019-02-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Lin YEH ,  Yu-Chang CHEN

IPC: H01L23/498 ,  H01L25/16 ,  H01L23/31 ,  H01L21/48 ,  H01L21/56

Abstract: A semiconductor device package includes a substrate, a first solder paste, an electrical contact and a first encapsulant. The substrate includes a conductive pad. The first solder paste is disposed on the pad. The electrical contact is disposed on the first solder paste. The first encapsulant encapsulates a portion of the electrical contact and exposes the surface of the electrical contact. The electrical contact has a surface facing away from the substrate. A melting point of the electrical contact is greater than that of the first solder paste. The first encapsulant includes a first surface facing toward the substrate and a second surface opposite to the first surface. The second surface of the first encapsulant is exposed to air.

公开(公告)号：US20230215775A1

公开(公告)日：2023-07-06

申请号：US17569446

申请日：2022-01-05

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Lin YEH

IPC: H01L23/367 ,  H01L23/373

CPC classification number: H01L23/3677 ,  H01L23/3736

Abstract: An electronic package is provided in the present disclosure. The electronic package comprises: an electronic component; a thermal conductive element above the electronic component, wherein thermal conductive element includes a first metal; an adhesive layer between the electronic component and the thermal conductive element, wherein the first adhesive layer includes a second metal; and an intermetallic compound (IMC) between the first metal and the second metal.

公开(公告)号：US20220344234A1

公开(公告)日：2022-10-27

申请号：US17239483

申请日：2021-04-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Lin YEH

IPC: H01L23/367 ,  H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L21/56 ,  H01L21/48 ,  H01L23/31

Abstract: The present disclosure provides a semiconductor device package including a first substrate, a second substrate disposed over the first substrate, an electronic component disposed between the first substrate and the second substrate, a spacer disposed between the first substrate and the electronic component, and a supporting element disposed on the first substrate and configured to support the second substrate. The spacer is configured to control a distance between the first substrate and the second substrate through the electronic component. A method of manufacturing a semiconductor device package is also disclosed.

公开(公告)号：US20220013443A1

公开(公告)日：2022-01-13

申请号：US17486829

申请日：2021-09-27

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Lin YEH

IPC: H01L23/498 ,  H01L21/48 ,  H01L25/16

Abstract: A semiconductor device package includes a first substrate, a second substrate, a conductive structure, a first solder and a second solder. The second substrate is disposed over the first substrate. The conductive structure is disposed between the first substrate and the second substrate. The conductive structure includes a first wetting portion, a second wetting portion, and a non-wetting portion disposed between the first wetting portion and the second wetting portion. The first solder covers the first wetting portion and connects the conductive structure to the first substrate. The second solder covers the second wetting portion and connects the conductive structure to the second substrate. The first solder is spaced apart from the second solder by the non-wetting portion.