公开(公告)号：US20210043527A1

公开(公告)日：2021-02-11

申请号：US16537371

申请日：2019-08-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih HSIEH ,  Tun-Ching PI ,  Sung-Hung CHIANG ,  Yu-Chang CHEN

IPC: H01L23/13 ,  H01L23/14 ,  H01L23/498

Abstract: A semiconductor device package includes a carrier, a first interposer disposed and a second interposer. The second interposer is stacked on the first interposer, and the first interposer is mounted to the carrier. The combination of the first interposer and the second interposer is substantially T-shaped.

公开(公告)号：US20240249988A1

公开(公告)日：2024-07-25

申请号：US18099056

申请日：2023-01-19

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Yu-Chang CHEN ,  Wei-Tung CHANG ,  Jen-Chieh KAO

IPC: H01L23/31 ,  H01L21/56 ,  H01L23/538

CPC classification number: H01L23/315 ,  H01L21/563 ,  H01L21/568 ,  H01L23/3128 ,  H01L23/5381 ,  H01L23/5385 ,  H01L23/5389

Abstract: A semiconductor device package and a method of manufacturing the same are provided. The semiconductor device package includes a substrate, an electronic component, an intermediate structure and a protective layer. The electronic component is disposed over the substrate. The intermediate structure is disposed over the substrate and comprises an interposer and a conductive element on the interposer. The protective layer is disposed over the substrate and has an upper surface covering the electronic component and being substantially level with an upper surface of the conductive element.

公开(公告)号：US20210090982A1

公开(公告)日：2021-03-25

申请号：US17115629

申请日：2020-12-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Lin YEH ,  Yu-Chang CHEN

IPC: H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L23/31 ,  H01L25/16

Abstract: A semiconductor device package includes a substrate, a first solder paste, an electrical contact and a first encapsulant. The substrate includes a conductive pad. The first solder paste is disposed on the pad. The electrical contact is disposed on the first solder paste. The first encapsulant encapsulates a portion of the electrical contact and exposes the surface of the electrical contact. The electrical contact has a surface facing away from the substrate. A melting point of the electrical contact is greater than that of the first solder paste. The first encapsulant includes a first surface facing toward the substrate and a second surface opposite to the first surface. The second surface of the first encapsulant is exposed to air.

公开(公告)号：US20190074264A1

公开(公告)日：2019-03-07

申请号：US15698451

申请日：2017-09-07

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Bo-Syun CHEN ,  Tang-Yuan CHEN ,  Yu-Chang CHEN ,  Jin-Feng YANG ,  Chin-Li KAO ,  Meng-Kai SHIH

IPC: H01L25/065 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L21/4857 ,  H01L21/486 ,  H01L23/13 ,  H01L23/3677 ,  H01L23/49811 ,  H01L23/5383 ,  H01L23/5384 ,  H01L23/5385 ,  H01L23/5389 ,  H01L23/552 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/73 ,  H01L24/83 ,  H01L24/92 ,  H01L24/97 ,  H01L25/50 ,  H01L2224/16227 ,  H01L2224/29347 ,  H01L2224/32225 ,  H01L2224/73253 ,  H01L2224/83192 ,  H01L2224/92225 ,  H01L2224/97 ,  H01L2225/06517 ,  H01L2225/0652 ,  H01L2225/06537 ,  H01L2225/06558 ,  H01L2225/06572 ,  H01L2225/06582 ,  H01L2225/06589 ,  H01L2924/15192 ,  H01L2924/15311 ,  H01L2924/15313 ,  H01L2924/19105 ,  H01L2924/3025 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2224/81

Abstract: A semiconductor package structure includes a first substrate, at least one first semiconductor element and a second substrate. The first semiconductor element is attached to the first substrate. The second substrate defines a cavity and includes a plurality of thermal vias. One end of each of the thermal vias is exposed in the cavity, and the first semiconductor element is disposed within the cavity and thermally connected to the thermal vias.

公开(公告)号：US20250105161A1

公开(公告)日：2025-03-27

申请号：US18976228

申请日：2024-12-10

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih HSIEH ,  Tun-Ching PI ,  Sung-Hung CHIANG ,  Yu-Chang CHEN

IPC: H01L23/538 ,  H01L23/13 ,  H01L23/31 ,  H01L23/552 ,  H01L25/16

Abstract: A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.

公开(公告)号：US20220415810A1

公开(公告)日：2022-12-29

申请号：US17903921

申请日：2022-09-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih HSIEH ,  Tun-Ching PI ,  Sung-Hung CHIANG ,  Yu-Chang CHEN

IPC: H01L23/538 ,  H01L23/13 ,  H01L23/31 ,  H01L25/16 ,  H01L23/552

Abstract: A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.

公开(公告)号：US20210375706A1

公开(公告)日：2021-12-02

申请号：US17404912

申请日：2021-08-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih HSIEH ,  Tun-Ching PI ,  Sung-Hung CHIANG ,  Yu-Chang CHEN

IPC: H01L23/13 ,  H01L23/14 ,  H01L23/498

Abstract: A semiconductor device package includes a carrier, a first interposer disposed and a second interposer. The second interposer is stacked on the first interposer, and the first interposer is mounted to the carrier. The combination of the first interposer and the second interposer is substantially T-shaped.

公开(公告)号：US20200312733A1

公开(公告)日：2020-10-01

申请号：US16370633

申请日：2019-03-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chang-Lin YEH ,  Jen-Chieh KAO ,  Sheng-Yu CHEN ,  Yu-Chang CHEN ,  Yu-Chang CHEN

IPC: H01L23/31 ,  H01L25/065 ,  H01L23/00 ,  H01L23/29 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00

Abstract: A semiconductor package structure includes a substrate having a first surface and a second surface opposite to the first surface; a first encapsulant disposed on the first surface of the substrate, and defining a cavity having a sidewall, wherein an accommodating space is defined by the sidewall of the cavity of the first encapsulant and the substrate, and the accommodating space has a volume capacity; and a connecting element disposed adjacent to the first surface of the substrate and in the cavity, wherein a volume of the connecting element is substantially equal to the volume capacity of the accommodating space.

公开(公告)号：US20200083172A1

公开(公告)日：2020-03-12

申请号：US16560862

申请日：2019-09-04

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hao-Chih HSIEH ,  Tun-Ching PI ,  Sung-Hung CHIANG ,  Yu-Chang CHEN

IPC: H01L23/538 ,  H01L23/31 ,  H01L23/13 ,  H01L25/16 ,  H01L23/552

Abstract: A semiconductor device package includes a number of interposers mounted to the carrier, wherein the number of interposers may be arranged in an irregular pattern.

公开(公告)号：US20190287947A1

公开(公告)日：2019-09-19

申请号：US16434008

申请日：2019-06-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Bo-Syun CHEN ,  Tang-Yuan CHEN ,  Yu-Chang CHEN ,  Jin-Feng YANG ,  Chin-Li KAO ,  Meng-Kai SHIH

IPC: H01L25/065 ,  H01L23/552 ,  H01L25/00 ,  H01L23/13 ,  H01L23/498 ,  H01L21/48 ,  H01L23/367 ,  H01L23/538

Abstract: A semiconductor package structure includes: (1) a first substrate; (2) at least one first semiconductor element attached to the first substrate; and (3) a second substrate including a plurality of thermal vias and a plurality of conductive vias, wherein one end of each of the thermal vias directly contacts the first semiconductor element.