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公开(公告)号：US08036625B1
公开(公告)日：2011-10-11
申请号：US11774979
申请日：2007-07-09
申请人： Patrick Clement
发明人： Patrick Clement
IPC分类号： H04B1/26
CPC分类号： H03D7/00 , H03D2200/0072 , H04B1/28
摘要： In a method for mixing an information signal, a digital information signal at a sampling frequency fs is generated. A mixed signal is generated as a multiplication of the digital information signal with a mixing signal at the sampling frequency fs, wherein the mixing signal corresponds to a sinusoid having a frequency fm equal to fs/8.
摘要翻译： 在混合信息信号的方法中，产生采样频率fs的数字信息信号。 产生混合信号作为数字信息信号与采样频率fs的混合信号的乘法，其中混频信号对应于具有等于fs / 8的频率fm的正弦曲线。
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22.发明授权Electronic device and integrated circuit comprising a delta-sigma converter and method therefor 有权包括Δ-Σ转换器的电子设备和集成电路及其方法公开(公告)号：US07969339B2
公开(公告)日：2011-06-28
申请号：US12293744
申请日：2006-03-23
申请人： Patrick Clement , Maher Kayal , Sergio Pesenti
发明人： Patrick Clement , Maher Kayal , Sergio Pesenti
IPC分类号： H03M3/00
摘要： An integrated circuit comprises a delta-sigma modulator incorporating a delta-sigma modulation loop having an analog-to-digital converter in a forward path and a digital-to-analog converter in a feedback path such that the ADC is arranged to receive samples of an analog input signal. The ADC is operably coupled to auto-ranging logic arranged to shift a digital output signal from the ADC representative of the analog input signal to counteract an effect of an input variation of the analog input signal. In this manner, the application of auto-ranging logic with a self-recovery technique supports a reduction of the number of comparators required in a multi-bit delta-sigma ADC.
摘要翻译： 集成电路包括并入具有正向通路中的模数转换器和反馈路径中的数模转换器的Δ-Σ调制环路的Δ-Σ调制器，使得ADC被布置为接收 模拟输入信号。 ADC可操作地耦合到自动测距逻辑，其布置成从表示模拟输入信号的ADC移位数字输出信号，以抵消模拟输入信号的输入变化的影响。 以这种方式，具有自恢复技术的自动量程逻辑的应用支持减少多位Δ-ΣADC中所需的比较器的数量。
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公开(公告)号：US20080024375A1
公开(公告)日：2008-01-31
申请号：US11773928
申请日：2007-07-05
IPC分类号： H01Q1/12
摘要： An apparatus and method for receiving wireless signals couples an antenna input of a receiver to a human body and receives a signal conducting from said body. Impedance matching circuitry lessens signal power loss at the antenna input. Parameters of the impedance matching circuitry can be adjusted based on a detected impedance, a detected signal strength, or the frequency of the signal.
摘要翻译： 用于接收无线信号的装置和方法将接收机的天线输入耦合到人体并且接收从所述主体传导的信号。 阻抗匹配电路可减轻天线输入端的信号功率损耗。 可以基于检测到的阻抗，检测到的信号强度或信号的频率来调整阻抗匹配电路的参数。
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公开(公告)号：US08509687B1
公开(公告)日：2013-08-13
申请号：US12638879
申请日：2009-12-15
申请人： Patrick Clement , Lydi Smaini
发明人： Patrick Clement , Lydi Smaini
IPC分类号： H04B7/00
CPC分类号： H04B1/034 , H04B17/318
摘要： Embodiments of the present disclosure provide a device comprising a receiver port configured to be operatively coupled to a local receiver antenna; a transmitter port configured to be operatively coupled to a local transmitter antenna and to receive signals received by the local transmitter antenna at least for a portion of time while the local receiver antenna is not operatively coupled to the receiver port; and a quiet spot determination unit configured to receive signals received by the local receiver antenna at least for a portion of time while the local receiver antenna is operatively coupled to the receiver port, receive signals received by the local transmitter antenna at least for the portion of time while the local receiver antenna is not operatively coupled to the receiver port, and determine a quiet spot frequency. Other embodiments are also described and claimed.
摘要翻译： 本公开的实施例提供了一种设备，其包括被配置为可操作地耦合到本地接收机天线的接收器端口; 发射机端口，被配置为可操作地耦合到本地发射机天线，并且至少在一段时间内接收由本地发射机天线接收的信号，同时本地接收机天线不可操作地耦合到接收机端口; 以及安静点确定单元，被配置为在本地接收机天线可操作地耦合到接收器端口的同时至少在一段时间内接收由本地接收机天线接收的信号，至少部分地接收由本地发射机天线接收的信号 而本地接收机天线不可操作地耦合到接收器端口，并且确定安静的频点。 还描述和要求保护其他实施例。
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25.发明申请ELECTRONIC DEVICE AND INTEGRATED CIRCUIT COMPRISING A DELTA-SIGMA CONVERTER AND METHOD THEREFOR 有权包含三角形转换器的电子设备和集成电路及其方法公开(公告)号：US20100164773A1
公开(公告)日：2010-07-01
申请号：US12293744
申请日：2006-03-23
申请人： Patrick Clement , Maher Kayal , Sergio Pesenti
发明人： Patrick Clement , Maher Kayal , Sergio Pesenti
IPC分类号： H03M3/00
摘要： An integrated circuit comprises a delta-sigma modulator incorporating a delta-sigma modulation loop having an analog-to-digital converter in a forward path and a digital-to-analog converter in a feedback path such that the ADC is arranged to receive samples of an analog input signal. The ADC is operably coupled to auto-ranging logic arranged to shift a digital output signal from the ADC representative of the analog input signal to counteract an effect of an input variation of the analog input signal. In this manner, the application of auto-ranging logic with a self-recovery technique supports a reduction of the number of comparators required in a multi-bit delta-sigma ADC.
摘要翻译： 集成电路包括并入具有正向通路中的模数转换器和反馈路径中的数模转换器的Δ-Σ调制环的Δ-Σ调制器，使得ADC被布置为接收 模拟输入信号。 ADC可操作地耦合到自动测距逻辑，其布置成从表示模拟输入信号的ADC移位数字输出信号，以抵消模拟输入信号的输入变化的影响。 以这种方式，具有自恢复技术的自动量程逻辑的应用支持减少多位Δ-ΣADC中所需的比较器的数量。
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26.发明授权公开(公告)号：US07720454B1
公开(公告)日：2010-05-18
申请号：US11582067
申请日：2006-10-17
申请人： Patrick Clement , David Cousinard
发明人： Patrick Clement , David Cousinard
IPC分类号： H04B1/16
CPC分类号： H04B1/28 , H04B1/0032 , H04H40/18 , H04H2201/183
摘要： A radio frequency (RF) receiver includes an intermediate frequency (IF) mixer that generates an output signal based on mixing a hybrid in-band, on-channel (IBOC) signal with an intermediate frequency signal. An oscillator generates the intermediate frequency signal; wherein the intermediate frequency is less than a bandwidth of the IBOC signal.
摘要翻译： 射频（RF）接收机包括中频（IF）混频器，其基于混合带内同步信道（IBOC）信号和中频信号来产生输出信号。 振荡器产生中频信号; 其中中频小于IBOC信号的带宽。
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公开(公告)号：US06713100B1
公开(公告)日：2004-03-30
申请号：US09617930
申请日：2000-08-16
申请人： Daniel Schmoutz , Patrick Clement
发明人： Daniel Schmoutz , Patrick Clement
IPC分类号： A23G300
摘要： A novel, nutritious confectionery product with a taste, texture and color that is particularly appealing to children is disclosed. The food product includes non-cereal vegetable solids and solid fat characterized in that the non-cereal vegetable solids are present in the form of particles in an amount of at least about 15% by weight of the total weight of the confectionery product. These particles are surrounded by the fat. The non-cereal vegetable solids are added and mixed into a continuous phase of fat to provide a shaped fat-based product upon setting.
摘要翻译： 公开了一种具有特别吸引儿童的味道，质地和颜色的新颖营养的糖果产品。 食品包括非谷物植物固体和固体脂肪，其特征在于非谷物植物固体以颗粒形式存在，其量为糖果产品总重量的至少约15重量％。 这些颗粒被脂肪包围。 将非谷物植物固体加入并混合到连续的脂肪相中，以在设定时提供成型的脂肪基产品。
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28.发明授权Diversity channel data receiver with automatic alignment over a .+-.3.5-bit range 失效分频通道数据接收器，在+/- 3.5位范围内自动对准
公开(公告)号：US4744095A
公开(公告)日：1988-05-10
申请号：US895528
申请日：1986-08-11
CPC分类号： H04L1/02
摘要： An arrangement ensuring the change-over of two channels through which the same digital information is conveyed with automatic data alignment over a .+-.3.5 bit range comprises for each channel an array of buffer stores operating at a write rate H.sub.i /N.sub.i (where i=1, 2), an oscillator operating at a rate H which provides reading of the buffer stores at the rate H/N and being synchronized in phase-opposition with one or the other of the write rates, and a logic comparator controlling the write rates H.sub.i /N.sub.i, the routing of the write rates to the input of the oscillator, as well as a change-over switch for the data.In the buffer store of the channel assumed to be the one whose quality degrades, the data are converted into N parallel streams at the rate H.sub.2 /N and are read at the rate H/N of the oscillator. In the other channel, the write rate of the buffer store is forced to the rate H.sub.1 /N-1, the read rate remaining unchanged, until there is a coincidence of N bits in the two channels; thereupon the data stream is switched, the write rate is locked at H.sub.1 /N and this write rate is applied to the oscillator.
摘要翻译： 确保在+/- 3.5位范围内自动数据对齐传送相同数字信息的两个通道的切换的布置包括：对于每个通道，以写入速率Hi / Ni（其中i = 1,2），以以速率H / N提供对缓冲器的读取的速率H操作的振荡器，并且与写入速率中的一个或另一个以相位对准的方式同步;以及控制写入的逻辑比较器 速率Hi / Ni，写入速率到振荡器的输入的路由，以及数据的切换开关。 在假定为质量劣化的信道的缓冲存储器中，将数据以速率H2 / N转换成N个并行流，并以振荡器的速率H / N读取。 在另一个通道中，缓冲存储器的写入速率被强制为速率H1 / N-1，读取速率保持不变，直到两个通道中存在N位一致; 随后数据流被切换，写入速率被锁定在H1 / N，并且该写入速率被施加到振荡器。
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