公开(公告)号：US20090072279A1

公开(公告)日：2009-03-19

申请号：US12230557

申请日：2008-08-29

Applicant: Kirsten Moselund ,  Mihai Adrian Ionescu ,  Vincent Pott ,  Maher Kayal

Inventor： Kirsten Moselund ,  Mihai Adrian Ionescu ,  Vincent Pott ,  Maher Kayal

IPC: H01L29/78 ,  H03K17/16

CPC classification number: H01L29/7853 ,  G11C11/404 ,  H01L27/108 ,  H01L27/10823 ,  H01L27/10826 ,  H01L27/10876 ,  H01L27/10879 ,  H01L27/11 ,  H01L29/66795

Abstract: The present invention exploits the impact ionization induced by drain voltage increase and the onset of a bipolar parasitic in an Ω-gate field effect metal oxide insulator transistor (called PI-MOS), in order to obtain a memory effect and abrupt current switching.

Abstract translation: 本发明利用由欧姆格栅场效应金属氧化物绝缘体晶体管（称为PI-MOS）引起的漏极电压增加和双极性寄生的开始引起的电离电离，以获得存储效应和突然电流切换。

公开(公告)号：US20100332211A1

公开(公告)日：2010-12-30

申请号：US12824513

申请日：2010-06-28

Applicant: Alexandre OUDALOV ,  Yannick MARET ,  Ira NAGEL ,  Laurent FABRE ,  Maher KAYAL ,  Rachid CHERKOUI

Inventor： Alexandre OUDALOV ,  Yannick MARET ,  Ira NAGEL ,  Laurent FABRE ,  Maher KAYAL ,  Rachid CHERKOUI

IPC: G06F9/455

CPC classification number: G05B17/02

Abstract: An apparatus is provided for emulation of a power system. The apparatus includes a plurality of programmable elements which are selectively connectable to one another. Each programmable element includes at least two elements selected from the group consisting of a generator element, a line element and a load element. A programmable switch element is operable to selectively connect the at least two elements of each programmable element to one another, and to selectively connect the programmable element to one or more other programmable elements. A system, which incorporates the apparatus, is also provided for emulating a power system incorporating such apparatus.

Abstract translation: 提供了用于仿真电力系统的装置。 该装置包括可选择地彼此连接的多个可编程元件。 每个可编程元件包括从由发电机元件，线路元件和负载元件组成的组中选择的至少两个元件。 可编程开关元件可操作以选择性地将每个可编程元件的至少两个元件彼此连接，并且可选择地将可编程元件连接到一个或多个其它可编程元件。 结合该装置的系统也被提供用于模拟包含这种装置的电力系统。

公开(公告)号：US07746065B2

公开(公告)日：2010-06-29

申请号：US11663136

申请日：2005-09-14

Applicant: Marc Pastre ,  Hubert Blanchard ,  Maher Kayal

Inventor： Marc Pastre ,  Hubert Blanchard ,  Maher Kayal

IPC: G01R33/06

CPC classification number: G01R33/07 ,  G01R33/0035 ,  G01R33/075

Abstract: A magnetic field sensor comprises a reference magnetic field generator (8), a magnetic field sensing cell (6) including Hall effect sensing elements (12), and a signal processing circuit (4) connected to the output (11) of the magnetic field sensing cell and comprising one or more feedback lines (27, 28) for correcting error fluctuations in the transfer characteristic of the magnetic field sensor. The reference magnetic field generator is adapted to generate a frequency modulated reference magnetic field. The signal processing circuit further includes a modulator connected to the magnetic field sensing cell, adapted to modulate the output signal thereof at a frequency different from the modulation frequency of the reference magnetic field generator.

Abstract translation: 磁场传感器包括参考磁场发生器（8），包括霍尔效应感测元件（12）的磁场感测单元（6）和连接到磁场的输出端（11）的信号处理电路（4） 并且包括用于校正磁场传感器的传送特性中的误差波动的一个或多个反馈线（27,28）。 参考磁场发生器适于产生调频参考磁场。 信号处理电路还包括连接到磁场感测单元的调制器，适于以与参考磁场发生器的调制频率不同的频率调制其输出信号。

公开(公告)号：US07091785B2

公开(公告)日：2006-08-15

申请号：US10857332

申请日：2004-05-28

Applicant: Philippe Deval ,  Maher Kayal ,  Fabien Vaucher

Inventor： Philippe Deval ,  Maher Kayal ,  Fabien Vaucher

IPC: H03F3/45

CPC classification number: H03F3/4521

Abstract: An electronic amplifier circuit comprising an operational amplifier circuit, such as a two-stage operational amplifier circuit, in tandem with a operational transconductance amplifier. The electronic amplifier circuit has high open-loop gain and high gain-bandwidth while maintaining stability over a wide range of operating parameters.

Abstract translation: 一种电子放大器电路，包括与运算跨导放大器串联的诸如两级运算放大器电路的运算放大器电路。 电子放大器电路具有高开环增益和高增益带宽，同时在宽范围的工作参数下保持稳定性。

公开(公告)号：US06980461B2

公开(公告)日：2005-12-27

申请号：US11061069

申请日：2005-02-18

Applicant: Lionel Portmann ,  Maher Kayal ,  Marc Pastre ,  Marija Blagojevic ,  Michel Declercq

Inventor： Lionel Portmann ,  Maher Kayal ,  Marc Pastre ,  Marija Blagojevic ,  Michel Declercq

IPC: G11C7/14 ,  G11C11/4099 ,  G11C16/28 ,  G11C29/02 ,  G11C11/24

CPC classification number: G11C29/028 ,  G11C7/14 ,  G11C11/401 ,  G11C11/4099 ,  G11C16/28 ,  G11C29/02 ,  G11C29/12005 ,  G11C2029/5006 ,  G11C2211/4016

Abstract: There are many inventions described and illustrated herein. In a first aspect, the present invention is a technique and circuitry for reading data that is stored in memory cells. In one embodiment of this aspect, the present invention is a technique and circuitry for generating a reference current that is used, in conjunction with a sense amplifier, to read data that is stored in memory cells of a DRAM device. The technique and circuitry for generating a reference current may be implemented using an analog configuration, a digital configuration, and/or combinations of analog and digital configurations.

Abstract translation: 这里描述和说明了许多发明。 在第一方面，本发明是用于读取存储在存储单元中的数据的技术和电路。 在该方面的一个实施例中，本发明是用于产生参考电流的技术和电路，该参考电流结合读出放大器用于读取存储在DRAM器件的存储单元中的数据。 用于产生参考电流的技术和电路可以使用模拟配置，数字配置和/或模拟和数字配置的组合来实现。

公开(公告)号：US20050162931A1

公开(公告)日：2005-07-28

申请号：US11061069

申请日：2005-02-18

Applicant: Lionel Portmann ,  Maher Kayal ,  Marc Pastre ,  Marija Blagojevic ,  Michel Declercq

Inventor： Lionel Portmann ,  Maher Kayal ,  Marc Pastre ,  Marija Blagojevic ,  Michel Declercq

IPC: G11C7/14 ,  G11C11/4099 ,  G11C16/28 ,  G11C29/02 ,  G11C11/34 ,  G11C5/00 ,  G11C16/06

CPC classification number: G11C29/028 ,  G11C7/14 ,  G11C11/401 ,  G11C11/4099 ,  G11C16/28 ,  G11C29/02 ,  G11C29/12005 ,  G11C2029/5006 ,  G11C2211/4016

Abstract: There are many inventions described and illustrated herein. In a first aspect, the present invention is a technique and circuitry for reading data that is stored in memory cells. In one embodiment of this aspect, the present invention is a technique and circuitry for generating a reference current that is used, in conjunction with a sense amplifier, to read data that is stored in memory cells of a DRAM device. The technique and circuitry for generating a reference current may be implemented using an analog configuration, a digital configuration, and/or combinations of analog and digital configurations.

公开(公告)号：US09404991B2

公开(公告)日：2016-08-02

申请号：US13806080

申请日：2011-06-27

Applicant: Giovanni Maria Anelli ,  Marc Pastre ,  Andrea Ajbl ,  Maher Kayal

Inventor： Giovanni Maria Anelli ,  Marc Pastre ,  Andrea Ajbl ,  Maher Kayal

IPC: G01R33/12 ,  G05F1/10 ,  G01R35/00 ,  G01R33/00 ,  G01R33/07

CPC classification number: G01R35/005 ,  G01R33/0017 ,  G01R33/0029 ,  G01R33/0035 ,  G01R33/07

Abstract: Magnetic field sensor including a magnetic field sensing circuit (2) comprising a reference magnetic field generator (8) and a magnetic field sensing cell (6), and a signal processing circuit (4) connected to the output of the magnetic field sensing cell and comprising a demodulator circuit and a gain correction feedback circuit (30, 28, 47) for correcting error fluctuations in the transfer characteristic of the magnetic field sensor. The sensor further comprises a reference current generator (3) configured to generate a reference current I ref, the reference current generator connected to the magnetic field sensing circuit (2) configured for generating the reference magnetic field B ref and to the gain correction feedback circuit configured for providing a reference signal (yref) to which an output signal of the demodulator circuit may be compared.

Abstract translation: 包括包括参考磁场发生器（8）和磁场感测单元（6）的磁场感测电路（2）的磁场传感器以及连接到磁场感测单元的输出的信号处理电路（4）和 包括用于校正磁场传感器的传送特性中的误差波动的解调器电路和增益校正反馈电路（30,28,47）。 传感器还包括参考电流发生器（3），其被配置为产生参考电流I ref，连接到被配置用于产生参考磁场B ref的磁场感测电路（2）的参考电流发生器和与增益校正反馈电路 被配置为提供可以比较解调器电路的输出信号的参考信号（yref）。

公开(公告)号：US07969339B2

公开(公告)日：2011-06-28

申请号：US12293744

申请日：2006-03-23

Applicant: Patrick Clement ,  Maher Kayal ,  Sergio Pesenti

Inventor： Patrick Clement ,  Maher Kayal ,  Sergio Pesenti

IPC: H03M3/00

CPC classification number: H03M3/48 ,  H03M1/181 ,  H03M1/20 ,  H03M3/49

Abstract: An integrated circuit comprises a delta-sigma modulator incorporating a delta-sigma modulation loop having an analog-to-digital converter in a forward path and a digital-to-analog converter in a feedback path such that the ADC is arranged to receive samples of an analog input signal. The ADC is operably coupled to auto-ranging logic arranged to shift a digital output signal from the ADC representative of the analog input signal to counteract an effect of an input variation of the analog input signal. In this manner, the application of auto-ranging logic with a self-recovery technique supports a reduction of the number of comparators required in a multi-bit delta-sigma ADC.

Abstract translation: 集成电路包括并入具有正向通路中的模数转换器和反馈路径中的数模转换器的Δ-Σ调制环路的Δ-Σ调制器，使得ADC被布置为接收 模拟输入信号。 ADC可操作地耦合到自动测距逻辑，其布置成从表示模拟输入信号的ADC移位数字输出信号，以抵消模拟输入信号的输入变化的影响。 以这种方式，具有自恢复技术的自动量程逻辑的应用支持减少多位Δ-ΣADC中所需的比较器的数量。

公开(公告)号：US20100164645A1

公开(公告)日：2010-07-01

申请号：US12676335

申请日：2007-09-14

Applicant: Kazuhiko Kobayashi ,  Yuu Watanabe ,  Paulo Augusto Dal Fabbro ,  Maher Kayal

Inventor： Kazuhiko Kobayashi ,  Yuu Watanabe ,  Paulo Augusto Dal Fabbro ,  Maher Kayal

IPC: H03H7/38

CPC classification number: H03F1/565 ,  H03F3/195 ,  H03F2200/144 ,  H03F2200/222 ,  H03F2200/387 ,  H03F2200/391 ,  H03F2200/451 ,  H03F2200/453 ,  H03F2200/456 ,  H03F2200/541 ,  H03H7/38 ,  H03H11/40

Abstract: The tunable impedance circuit comprises capacitors C1 and C2, an inductor L1, and an inductor L2 magnetically coupled with the inductor L1. The control current Icontrol with variable phase and amplitude from the control circuit 13 flows in the inductor L2. The impedance of the inductor L1 is changed by changing the phase and amplitude of the control current Icontrol. The output impedance is set to an optimum level by setting an effective inductance and an effective quality factor of the tunable impedance circuit 12a to be optimum by means of the phase and amplitude of the control current Icontrol relative to output current IRF of RF PA 11.

Abstract translation: 可调谐阻抗电路包括电容器C1和C2，电感器L1和与电感器L1磁耦合的电感器L2。 来自控制电路13的具有可变相位和振幅的控制电流Icontrol在电感器L2中流动。 通过改变控制电流Icontrol的相位和幅度来改变电感L1的阻抗。 通过将控制电流Icontrol的相位和幅度相对于RF PA11的输出电流IRF设置为可调谐阻抗电路12a的有效电感和有效质量因子来将输出阻抗设置为最佳电平。

公开(公告)号：US06912150B2

公开(公告)日：2005-06-28

申请号：US10840902

申请日：2004-05-07

Applicant: Lionel Portman ,  Maher Kayal ,  Marc Pastre ,  Marija Blagojevic ,  Michel Declercq

Inventor： Lionel Portman ,  Maher Kayal ,  Marc Pastre ,  Marija Blagojevic ,  Michel Declercq

IPC: G11C7/14 ,  G11C11/4099 ,  G11C16/28 ,  G11C29/02 ,  G11C11/24

CPC classification number: G11C29/028 ,  G11C7/14 ,  G11C11/401 ,  G11C11/4099 ,  G11C16/28 ,  G11C29/02 ,  G11C29/12005 ,  G11C2029/5006 ,  G11C2211/4016

Abstract: There are many inventions described and illustrated herein. In a first aspect, the present invention is a technique and circuitry for reading data that is stored in memory cells. In one embodiment of this aspect, the present invention is a technique and circuitry for generating a reference current that is used, in conjunction with a sense amplifier, to read data that is stored in memory cells of a DRAM device. The technique and circuitry for generating a reference current may be implemented using an analog configuration, a digital configuration, and/or combinations of analog and digital configurations.