公开(公告)号：US20160202298A1

公开(公告)日：2016-07-14

申请号：US14993711

申请日：2016-01-12

Applicant: Apple Inc.

Inventor： Kingsuk Brahma ,  David A. Stronks ,  Hopil Bae ,  Wei H. Yao

IPC: G01R27/20 ,  G09G3/20

CPC classification number: G01R27/205 ,  G09G3/006 ,  G09G3/2092 ,  G09G3/2096 ,  G09G3/3607 ,  G09G3/3696 ,  G09G2300/0426 ,  G09G2310/08 ,  G09G2320/0223

Abstract: A display may have a substrate layer to which a display driver integrated circuit and flexible printed circuit are bonded. The display driver integrated circuit may be provided with switches and control circuitry for controlling the operation of the switches during bond resistance measurements. Test equipment may apply currents to pads in the display driver integrated circuit through contacts in the flexible printed circuit while controlling the switching circuitry. Based on these measurements and the measurement of trace resistances in a dummy flexible printed circuit, the test equipment may determine bond resistances for bonds between the display driver integrated circuit and the display substrate and between the flexible printed circuit and the display substrate. Displays may have master and slave display driver integrated circuits that share coarse reference voltages produced by the master from raw power supply voltages.

Abstract translation: 显示器可以具有显示驱动器集成电路和柔性印刷电路结合到其上的基板层。 显示驱动器集成电路可以设置有用于在接合电阻测量期间控制开关的操作的开关和控制电路。 测试设备可以通过柔性印刷电路中的触点在显示驱动器集成电路中的焊盘上施加电流，同时控制开关电路。 基于这些测量和虚拟柔性印刷电路中的迹线电阻的测量，测试设备可以确定显示驱动器集成电路和显示器基板之间以及柔性印刷电路和显示器基板之间的结合的结合电阻。 显示器可以具有主从显示驱动器集成电路，其从原始电源电压共享由主机产生的粗参考电压。

公开(公告)号：US09318068B2

公开(公告)日：2016-04-19

申请号：US14081834

申请日：2013-11-15

Applicant: APPLE INC.

Inventor： David A. Stronks ,  Hopil Bae ,  Kingsuk Brahma ,  Sang Y. Youn

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G3/3648 ,  G09G2310/0248 ,  G09G2330/021

Abstract: Systems and methods for efficiently generating display driver timing signals are provided. In one example, display driver circuitry of an electronic display may provide a negative voltage from a negative voltage supply to display control circuitry during a first period and may provide a positive voltage from a positive voltage supply to the display control circuitry during a second period. After providing the negative voltage during the first period but before providing the positive voltage during the second period, the display driver circuitry may precharge the capacitance of the display control circuitry to ground. In this way, the positive voltage supply substantially does not supply charge to raise the voltage on the capacitance of the display control circuitry from the negative voltage to ground.

Abstract translation: 提供了有效地产生显示驱动器定时信号的系统和方法。 在一个示例中，电子显示器的显示驱动器电路可以在第一时段期间从负电压源提供负电压到显示控制电路，并且可以在第二时段期间从正电压电源向显示控制电路提供正电压。 在第一时段内提供负电压之后但在第二周期期间提供正电压之前，显示驱动器电路可以将显示控制电路的电容预充电到地。 以这种方式，正电压基本上不提供电荷以将显示控制电路的电容的电压从负电压提升到地。

公开(公告)号：US09001097B2

公开(公告)日：2015-04-07

申请号：US13654231

申请日：2012-10-17

Applicant: Apple Inc.

Inventor： Ahmad Al-Dahle ,  David A. Stronks ,  Hopil Bae

IPC: G09G3/36 ,  G09G5/10 ,  G09G3/00

CPC classification number: G09G3/3696 ,  G09G3/006 ,  G09G3/3655 ,  G09G2310/067 ,  G09G2320/0223 ,  G09G2320/0233 ,  G09G2320/0693 ,  G09G2360/145

Abstract: Systems, methods, and devices for calibrating an electronic display to reduce or eliminate a mura artifact are provided. The mura artifact may be due to differential behavior of common voltage layers (VCOMs) in the electronic display. One method for reducing or eliminating the mura artifact may involve setting pixels of the electronic display to a first gray level and measuring a luminance difference between light and dark areas of a mura artifact on the electronic display. A value of an operating parameter of the electronic display may be adjusted while monitoring the luminance difference measurement. A value of the operating parameter that causes the luminance difference measurement to be within a specified range of acceptable luminance difference measurement values may be stored in the electronic display.

Abstract translation: 提供了用于校准电子显示器以减少或消除mura伪影的系统，方法和设备。 该mura伪影可能是由于电子显示器中的公共电压层（VCOM）的差异行为。 用于减少或消除凹陷假象的一种方法可以包括将电子显示器的像素设置为第一灰度级并且测量电子显示器上的mura伪影的亮区和暗区之间的亮度差。 可以在监视亮度差测量的同时调整电子显示器的操作参数的值。 导致亮度差测量在可接受的亮度差测量值的指定范围内的操作参数的值可以存储在电子显示器中。

公开(公告)号：US20150015559A1

公开(公告)日：2015-01-15

申请号：US13937825

申请日：2013-07-09

Applicant: Apple Inc.

Inventor： Abbas Jamshidi-Roudbari ,  Cheng-Ho Yu ,  Hopil Bae ,  Shih Chang Chang ,  Ting-Kuo Chang

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G3/3688 ,  G09G2310/0245 ,  G09G2310/0297 ,  G09G2320/0204 ,  G09G2320/0266 ,  G09G2330/027

Abstract: Methods and devices employing charge removal circuitry are provided to reduce or eliminate artifacts due to a bias voltage remaining on an electronic display after the display is turned off. In one example, a method may include connecting a pixel electrode of a display to ground through charge removal circuitry while the display is off (e.g., using depletion-mode transistors that are active when gates of the depletion-mode transistors are provided a ground voltage). When a corresponding common electrode is also connected to ground, a voltage difference between the pixel electrode and common electrode may be reduced or eliminated, preventing a bias voltage from causing display artifacts in the pixel.

Abstract translation: 提供了使用电荷去除电路的方法和装置，以减少或消除由于在显示器关闭之后电子显示器上剩余的偏置电压引起的伪影。 在一个示例中，方法可以包括通过电荷去除电路将显示器的像素电极连接到显示器关闭时（例如，使用在耗尽型晶体管的栅极被提供接地电压时有效的耗尽型晶体管） ）。 当相应的公共电极也接地时，可以减小或消除像素电极和公共电极之间的电压差，从而防止偏压在像素中引起显示伪影。

公开(公告)号：US20140132585A1

公开(公告)日：2014-05-15

申请号：US13890928

申请日：2013-05-09

Applicant: Apple Inc

Inventor： Sang Y. Youn ,  Hopil Bae ,  David A. Stronks ,  Kingsuk Brahma ,  Taif A. Syed

IPC: G09G3/36

CPC classification number: G09G3/3611 ,  G09G2310/0297 ,  G09G2330/021

Abstract: The present disclosure relates to devices and methods for reducing power consumption of a display. One electronic display includes a first switch coupled between a first gate of a first transistor and a second gate of a second transistor to selectively connect the first gate to the second gate. The display includes a second switch coupled between the second gate of the second transistor and a third gate of a third transistor to selectively connect the second gate to the third gate. The display also includes driving circuitry that controls the first switch to connect the first gate to the second gate to share a first charge between the first and second gates. The driving circuitry also controls the second switch to connect the second gate to the third gate to share a second charge between the second and third gates. Accordingly, power consumption of the display may be reduced.

Abstract translation: 本公开涉及用于降低显示器的功耗的装置和方法。 一个电子显示器包括耦合在第一晶体管的第一栅极和第二晶体管的第二栅极之间的第一开关，以选择性地将第一栅极连接到第二栅极。 显示器包括耦合在第二晶体管的第二栅极和第三晶体管的第三栅极之间的第二开关，以选择性地将第二栅极连接到第三栅极。 显示器还包括控制第一开关以将第一栅极连接到第二栅极以共享第一和第二栅极之间的第一电荷的驱动电路。 驱动电路还控制第二开关以将第二栅极连接到第三栅极，以在第二和第三栅极之间共享第二电荷。 因此，可以减少显示器的功耗。

公开(公告)号：US12142180B2

公开(公告)日：2024-11-12

申请号：US17933884

申请日：2022-09-21

Applicant: Apple Inc.

Inventor： Mohammad B Vahid Far ,  Hopil Bae ,  Mahdi Farrokh Baroughi ,  Xiaofeng Wang

IPC: G09G3/20 ,  G09G3/00 ,  G09G3/3208 ,  G09G3/3225 ,  G09G3/3266 ,  G11C19/28

Abstract: An electronic display includes an active area including multiple pixels. The electronic display also includes a first row driver set including a first column of row drivers and a second column of row drivers. A first active row driver in the first column of row drivers drives a first portion of the multiple pixels, and a first spare row driver in the second column of row drivers is in an inactive state. The electronic display also includes a second row driver set including a third column of row drivers and a fourth column of row drivers. A third active row driver in the third column of row drivers drives a second portion of the multiple pixels, and a second spare row driver in the fourth column of row drivers is inactive.

公开(公告)号：US20240021132A1

公开(公告)日：2024-01-18

申请号：US18318484

申请日：2023-05-16

Applicant: Apple Inc.

Inventor： Hopil Bae ,  Xiang Lu ,  Haitao Li

IPC: G09G3/20 ,  G09G3/32

CPC classification number: G09G3/2051 ,  G09G3/32 ,  G09G3/2022 ,  G09G2310/08 ,  G09G2320/0247

Abstract: In accordance with embodiments of the present disclosure, a device may include a pulsed emission electronic display having multiple display pixels in order to display an image frame. The display may pulse one or more display pixels of over a plurality of sub-frames within the image frame based on display image data. The device may also include image processing circuitry to generate the display image data based on source image data indicative of an image to be displayed during the image frame. Additionally, the image processing circuitry may dither an order of the plurality of sub-frames.

公开(公告)号：US20240005890A1

公开(公告)日：2024-01-04

申请号：US18216489

申请日：2023-06-29

Applicant: Apple Inc.

Inventor： Seung B. Rim ,  Mahdi Farrokh Baroughi ,  Hopil Bae ,  Haitao Li ,  Young Don Bae ,  Mahesh B. Chappalli ,  Meir Harar

IPC: G09G5/00

CPC classification number: G09G5/003 ,  G09G2330/021 ,  G09G2360/147

Abstract: The present disclosure is directed to estimating and modulating peak luminance of the display substantially in real-time to allow very bright pixels to be shown on the electronic display as long as the total electrical energy drawn by the electronic display does not exceed a threshold. The amount of electrical energy that is being drawn by the electronic display may be estimated from the image data by counting the number of rows of pixels that are emitting pulses in discrete bins of time. Because the pulses draw a predictable amount of electrical energy per row per time bin, the amount of electrical energy drawn by the electronic display may be estimated substantially in real time. The image data on the electronic display may therefore be modulated to avoid drawing too much electrical energy from the power source of the electronic device while permitting a high dynamic range.

公开(公告)号：US20240005850A1

公开(公告)日：2024-01-04

申请号：US18334914

申请日：2023-06-14

Applicant: Apple Inc.

Inventor： Sunmin Jang ,  Ce Zhang ,  Hopil Bae ,  Mahdi Farrokh Baroughi ,  Pablo Moreno Galbis ,  Paolo Sacchetto ,  Yaser Azizi ,  Young Don Bae

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2320/041 ,  G09G2320/0626

Abstract: To reduce image artifacts induced by temperature variations associated with display pixels of an electronic display, processing circuitry may process temperature sensing data to obtain an average temperature and a temperature distribution of the electronic display. Based on the processed temperature data, the processing circuit may adjust a reference voltage applied to the display pixels to compensate for the average temperate. To further correct for the image artifacts, the processing circuitry may transform image data to luminance domain. Based on the processed temperature data, the processing may adjust luminance vales of the image data to compensate for the temperature distribution.

公开(公告)号：US20230368718A1

公开(公告)日：2023-11-16

申请号：US18296934

申请日：2023-04-06

Applicant: Apple Inc.

Inventor： Sunmin Jang ,  Mahdi Farrokh Baroughi ,  Saif Choudhary ,  Hopil Bae ,  Gautam Agrawal ,  Ionut A Mirel ,  Hari P Paudel ,  Haitao Li ,  Wei H Yao ,  Mahesh B Chappalli

IPC: G09G3/20 ,  G09G3/32

CPC classification number: G09G3/2007 ,  G09G3/32 ,  G09G2300/0426 ,  G09G2320/0626 ,  G09G2360/16 ,  G09G2320/02 ,  G09G2310/0264 ,  G09G2310/08

Abstract: To reduce image artifacts and non-uniformity associated with a display pixel of an electronic display, processing circuity may adjust a luminance value corresponding to a display pixel according to a per-pixel gain mask, a per-pixel anode mask, or both. To further correct for the non-uniformity, the processing circuitry may convert the luminance value to a digital code based on a curve associated with an anode on which the display pixel is located.