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21.
公开(公告)号:US20230086999A1
公开(公告)日:2023-03-23
申请号:US17801003
申请日:2021-10-12
Inventor: Tongshang SU , Jun CHENG , Bin ZHOU , Ce ZHAO , Qinghe WANG , Jun WANG , Liangchen YAN
Abstract: Provided are a gate driving circuit and a manufacturing method therefor, an array substrate, and a display device, relating to the technical field of display. At least one transistor in the gate driving circuit comprises a first light-shielding layer made of an electrically conductive material, and the first light-shielding layer is connected to a first gate metal layer of the transistor, such that two electrically conductive channels are formed, and the ON-state current is increased, thereby effectively suppressing negative drift of a threshold voltage.
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公开(公告)号:US20220293709A1
公开(公告)日:2022-09-15
申请号:US17625029
申请日:2021-04-08
Inventor: Tongshang SU , Jun CHENG , Qinghe WANG , Yongchao HUANG , Chao WANG , Zhiwen LUO , Liangchen YAN
Abstract: The present disclosure provides an array substrate, a manufacturing method thereof, and a display device including the array substrate. The array substrate includes a substrate, a first electrode on the substrate, a light-emitting layer on a side of the first electrode away from the substrate, a second electrode on a side of the light-emitting layer away from the first electrode, and an auxiliary electrode on the side of the light-emitting layer away from the first electrode and electrically connected with the second electrode.
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公开(公告)号:US20220173125A1
公开(公告)日:2022-06-02
申请号:US17349164
申请日:2021-06-16
Inventor: Haitao WANG , Jun CHENG , Ming WANG , Qinghe WANG , Jun WANG , Tongshang SU
Abstract: The disclosure discloses an array substrate and a preparation method thereof, a display panel and a display device. The array substrate includes: a substrate, and a first metal layer, a metal oxide layer and a second metal layer which are sequentially stacked and isolated from each other on the substrate; the first metal layer includes a light shading metal, a first electrode, and an anti-static line; the metal oxide layer includes a first active layer; the second metal layer includes a gate line and a second electrode; the gate line is connected with the anti-static line through a first TFT, one of the first electrode and the second electrode forms the source and drain electrodes of the first TFT, and the other forms the gate electrode of the first TFT; and the source is electrically connected with the gate line, and the drain is electrically connected with the anti-static line.
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公开(公告)号:US20210296406A1
公开(公告)日:2021-09-23
申请号:US17264283
申请日:2020-05-12
Inventor: Jingang FANG , Luke DING , Jun LIU , Bin ZHOU , Jun CHENG
Abstract: The present disclosure relates to the technical field of display, and discloses an array substrate, a preparation method therefor, and a display device. When dielectric layers, such as a buffer layer, an interlayer dielectric layer, and a gate insulation layer, are formed between a source-drain electrode and a substrate, the thickness of at least one dielectric layer among said dielectric layers underneath a first through hole for connecting a drain electrode and an anode is increased, which is to say that the drain electrode is raised to be further away from the substrate, causing the drain electrode to be closer to a surface of a planarization layer that faces away from the substrate, i.e., reducing the thickness of a portion of the planarization layer above the drain electrode.
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公开(公告)号:US20210267053A1
公开(公告)日:2021-08-26
申请号:US17183909
申请日:2021-02-24
Inventor: Yongchao HUANG , Qinghe WANG , Haitao WANG , Jun LIU , Jun CHENG , Ce ZHAO , Liangchen YAN
Abstract: The present disclosure provides a display substrate, a method for manufacturing the display substrate, and a display device. The display substrate includes a first conductive line extending in a first direction on a base substrate, a second conductive line extending in a second direction crossing the first direction on the base substrate, and an insulation layer arranged between the first conductive line and the second conductive line. The display substrate further includes a buffer layer arranged between the first conductive line and the base substrate, a groove extending in the first direction is formed in the buffer layer, the first conductive line is arranged in the groove, and a surface of the first conductive line away from the base substrate is flush with a surface of the buffer layer away from the base substrate.
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公开(公告)号:US20190371867A1
公开(公告)日:2019-12-05
申请号:US16488924
申请日:2019-01-31
Inventor: Yongchao HUANG , Dongfang WANG , Jun CHENG , Min HE , Bin ZHOU , Ce ZHAO
Abstract: A display panel, a method for manufacturing the display panel, and a display apparatus are provided. The display panel includes a base substrate; a thin film transistor; an OLED structure formed on the thin film transistor including a first and second electrodes arranged opposite to each other and an organic light emitting layer arranged between the first and second electrodes; a light shielding layer arranged between the first electrode and the organic light emitting layer. The light shielding layer includes a first and a second light shielding layers. The first light shielding layer includes a first light shielding portion and a first opening portion corresponding to a pixel area. The second light shielding layer includes a second light shielding portion and a second opening portion corresponding to a pixel area. The second light shielding portion includes a first and second parts.
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27.
公开(公告)号:US20190172953A1
公开(公告)日:2019-06-06
申请号:US15992909
申请日:2018-05-30
Inventor: Yuankui DING , Ce ZHAO , Guangcai YUAN , Yingbin HU , Leilei CHENG , Jun CHENG , Bin ZHOU
IPC: H01L29/786 , H01L27/12 , H01L29/66
Abstract: The present disclosure discloses a TFT, a manufacturing method, an array substrate, a display panel, and a device. The TFT includes a hydrogen-containing buffer layer located on a substrate; an oxide semiconductor layer located on the buffer layer, wherein the oxide semiconductor layer includes a conductor region and a semiconductor region; a source or drain located on the conductor region, and electrically connected to the conductor region; and a gate structure located on the semiconductor region.
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公开(公告)号:US20180019263A1
公开(公告)日:2018-01-18
申请号:US15545817
申请日:2016-04-15
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xiangyong KONG , Jun CHENG , Xiaodi LIU
IPC: H01L27/12 , H01L29/49 , H01L29/786 , H01L29/45 , G02F1/1343 , G02F1/1362 , G02F1/1368
CPC classification number: H01L27/124 , G02F1/13439 , G02F1/136286 , G02F1/1368 , G02F2001/136295 , G02F2201/123 , H01L21/77 , H01L27/12 , H01L27/1225 , H01L27/127 , H01L27/1288 , H01L29/45 , H01L29/4908 , H01L29/78618 , H01L29/7869
Abstract: The embodiments of present disclosure disclose an array substrate, a method for manufacturing the array substrate, and a display device. The method includes forming a pixel electrode layer, a gate metal layer, and a source/drain metal layer on a base substrate, the pixel electrode layer including a first connection part pattern, the gate metal layer including a second connection part pattern, the source/drain metal layer including a third connection part pattern, wherein the first connection part pattern and the second connection part pattern overlap, and a portion of the first connection part pattern extending beyond the second connection part pattern is electrically connected with the third connection part pattern through a first via hole.
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公开(公告)号:US20170194448A1
公开(公告)日:2017-07-06
申请号:US15313141
申请日:2016-03-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xiangyong KONG , Lung Pao HSIN , Jun CHENG
IPC: H01L29/45 , H01L21/311 , H01L29/417 , H01L21/4757 , H01L29/66 , H01L21/768 , H01L29/786
CPC classification number: H01L29/45 , H01L21/31144 , H01L21/47573 , H01L21/76802 , H01L27/124 , H01L29/41733 , H01L29/66969 , H01L29/78618 , H01L29/7869
Abstract: Embodiments of the present disclosure provide an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a base substrate, a first electrode pattern, a second electrode pattern, and an active layer pattern disposed on the base substrate, a first electrode protection pattern coating the first electrode pattern, and a second electrode protection pattern coating the second electrode pattern. The active layer pattern is disposed between the first electrode pattern and the second electrode pattern. The first electrode protection pattern and the second electrode protection pattern are connected to two sides of the active layer pattern, respectively. The problem that, the active layer pattern cannot be connected to the first electrode pattern and the second electrode pattern due to the surface oxidation, when the first electrode pattern and the second electrode pattern adopt material with low resistance characteristic, is avoided, thus increasing the product yield.
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公开(公告)号:US20240057388A1
公开(公告)日:2024-02-15
申请号:US17637458
申请日:2021-04-21
Inventor: Jun WANG , Haitao WANG , Tongshang SU , Qinghe WANG , Ning LIU , Bin ZHOU , Jun CHENG
IPC: H10K59/122 , H10K59/80 , H10K59/12
CPC classification number: H10K59/122 , H10K59/80522 , H10K59/1201
Abstract: A display substrate includes a driving circuit layer arranged on a base and a light emitting structure layer arranged on one side, away from the base, of the driving circuit layer; the light emitting structure layer includes an anode, a pixel definition layer, an organic light emitting layer, a cathode, and an auxiliary electrode; the pixel definition layer has a first pixel opening exposing the anode and a second pixel opening exposing the auxiliary electrode; the organic light emitting layer connected to the anode and the cathode connected to the organic light emitting layer are arranged in the first pixel opening; the organic light emitting layer separated from the auxiliary electrode and the cathode located on one side, away from the base, of the organic light emitting layer are arranged in the second pixel opening; and the cathode is connected to the auxiliary electrode in the second pixel opening.
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