公开(公告)号：US6038536A

公开(公告)日：2000-03-14

申请号：US16615

申请日：1998-01-30

申请人： Baher S. Haroun ,  Suman Narayan

发明人： Baher S. Haroun ,  Suman Narayan

IPC分类号： G10L19/00 ,  H03M7/30 ,  G10L5/02 ,  G11B5/00

CPC分类号： G10L19/002 ,  H03M7/30

摘要： A method is provided for compressing relatively time invariant binary data, such as speech data in a telephone answering device, using statistical analysis of changes in the data. An original record organized into multiple frames of multiple bits each is used to construct an XORed record of the same number of frames and bits. The XORed record has a base frame with the same bit value pattern as a corresponding base frame of the original record, and remaining frames with bit values given by the outputs of an exclusive-OR operation applied to the bit values of corresponding and prior frames of the original record. The bit positions of the XORed record frame set are analyzed and reordered, according to their bit value change activity and used to construct an output record. The output record may have a base frame with the same bit value pattern as the corresponding reordered XORed record base frame. Other output record frames are established using a compression scheme wherein at least low bit value change subframes of the reordered XORed record frames are compressed by replacing them with shorter bit patterns having a format comprising a first part representing the number of bit changes occurring in the subframe and a second part identifying the location or locations, if any, of those changes. The foregoing procedure is reversed to restore the original record from the output record.

摘要翻译： 提供一种用于使用数据中的变化的统计分析来压缩相对时间不变二进制数据的方法，诸如电话应答设备中的语音数据。 组织成多个多个位的原始记录各自用于构造相同数量的帧和位的异或记录。 异或记录具有与原始记录的相应基本帧相同的比特值模式的基本帧，并且具有由异或运算的输出给出的比特值的剩余帧应用于相应和先前帧的比特值 原始记录。 根据其位值变化活动对异或记录帧集合的位位置进行分析和重新排序，并用于构建输出记录。 输出记录可以具有与相应的重新排序的异或记录基本帧相同的比特值模式的基本帧。 使用压缩方案建立其他输出记录帧，其中通过用具有包括表示在子帧中发生的位改变的数量的第一部分的格式的较短位模式来替换它们来压缩重新排序的异或记录帧的至少低位值改变子帧 以及识别这些改变的位置或位置（如果有的话）的第二部分。 上述过程相反，以从输出记录恢复原始记录。

公开(公告)号：US08831085B2

公开(公告)日：2014-09-09

申请号：US13327247

申请日：2011-12-15

申请人： Rahmi Hezar ,  Lei Ding ,  Joonhoi Hur ,  Baher S. Haroun

发明人： Rahmi Hezar ,  Lei Ding ,  Joonhoi Hur ,  Baher S. Haroun

IPC分类号： H03K7/08

CPC分类号： H04L1/0071 ,  H04B1/04

摘要： A method for transmitting radio frequency (RF) signals is provided. In-phase (I) and quadrature (Q) signals are received and filtered using sigma-delta modulation. I and Q pulse width modulation signals are generated from the filtered I and Q signals and interleaved so as to generate a time-interleaved signal. The time-interleaved signal is then amplified to generate the RF signals.

摘要翻译： 提供了一种用于发射射频（RF）信号的方法。 使用Σ-Δ调制接收和滤波同相（I）和正交（Q）信号。 从经滤波的I和Q信号产生I和Q脉宽调制信号并进行交织，以产生时间交织的信号。 然后对时间交织的信号进行放大以产生RF信号。

公开(公告)号：US08786338B2

公开(公告)日：2014-07-22

申请号：US13295885

申请日：2011-11-14

申请人： Vijay B. Rentala ,  Srinath M. Ramaswamy ,  Brian P. Ginsburg ,  Eunyoung Seok ,  Baher S. Haroun

发明人： Vijay B. Rentala ,  Srinath M. Ramaswamy ,  Brian P. Ginsburg ,  Eunyoung Seok ,  Baher S. Haroun

IPC分类号： H03L7/06 ,  G01S13/08 ,  H03L7/081 ,  G01S13/00 ,  H03L7/089

CPC分类号： G01S13/00 ,  G01S13/08 ,  H03K2005/00071 ,  H03L7/0812 ,  H03L7/0891

摘要： A method for providing a plurality of narrow pulses is provided. A first pulse having a first width is received by a delay line having a plurality of delay cells. This first pulse has a first width. In response to this first pulse, a plurality of second pulses is generated by the delay line, where each second pulse has a second width that is less than the first width. First and second delay pulses are also generated by the delay line, and a delay for each delay cell in the delay line can then be adjusted if a rising edge of the second delay pulse is misaligned with a falling edge of the first delay pulse.

摘要翻译： 提供了一种用于提供多个窄脉冲的方法。 具有第一宽度的第一脉冲由具有多个延迟单元的延迟线接收。 该第一脉冲具有第一宽度。 响应于该第一脉冲，延迟线产生多个第二脉冲，其中每个第二脉冲具有小于第一宽度的第二宽度。 第一延迟脉冲和第二延迟脉冲也由延迟线产生，并且如果第二延迟脉冲的上升沿与第一延迟脉冲的下降沿不一致，则可延迟延迟线中的每个延迟单元的延迟。

公开(公告)号：US20130234795A1

公开(公告)日：2013-09-12

申请号：US13416841

申请日：2012-03-09

申请人： Joonhoi Hur ,  Lei Ding ,  Rahmi Hezar ,  Baher S. Haroun

发明人： Joonhoi Hur ,  Lei Ding ,  Rahmi Hezar ,  Baher S. Haroun

IPC分类号： H03F3/217

CPC分类号： H03F3/2173 ,  H03F1/56 ,  H03F2200/387

摘要： A method is provided. A first enable signal is asserted so as to enable a first driver, where the first driver has a first output and a first parasitic capacitance. A second enable signal is asserted so as to enable a second driver, where the second driver has a second output and a second parasitic capacitance. The first and second outputs are coupled together by a switching network when the second driver is enabled. Pulses from complementary first and second radio frequency (RF) signals are applied to the first driver, where there is a first set of free-fly intervals between consecutive pulses from the first and second RF signals, and pulses from complementary third and fourth RF signals are applied to the second driver, wherein there is a second set of free-fly interval between consecutive pulses from the third and fourth RF signals.

摘要翻译： 提供了一种方法。 第一使能信号被确定为使第一驱动器能够使第一驱动器具有第一输出和第一寄生电容。 第二使能信号被确定为使第二驱动器能够启动，其中第二驱动器具有第二输出和第二寄生电容。 当第二驱动器被使能时，第一和第二输出由交换网络耦合在一起。 来自互补第一和第二射频（RF）信号的脉冲被施加到第一驱动器，其中在来自第一和第二RF信号的连续脉冲之间存在第一组自由飞行间隔，以及来自互补的第三和第四RF信号的脉冲 被施加到第二驱动器，其中在来自第三和第四RF信号的连续脉冲之间存在第二组自由间隔。

公开(公告)号：US08513980B2

公开(公告)日：2013-08-20

申请号：US13281227

申请日：2011-10-25

申请人： Robert F. Payne ,  Baher S. Haroun

发明人： Robert F. Payne ,  Baher S. Haroun

IPC分类号： H03K5/22

CPC分类号： H03K5/2481

摘要： An apparatus is provided. The apparatus comprises backend circuitry and pairs of redundant input circuits. Each pair of redundant input circuits is configured to form a differential pair of transistors, and each redundant input circuit includes a multiplexer and a set of transistors. The multiplexer is coupled to the backend circuitry, and each transistor from the set of transistors has a first passive electrode, a second passive electrode, and a control electrode. The first passive electrode of each transistor from the set of transistors is coupled to the multiplexer, and the control electrodes from the set of transistors are coupled together.

摘要翻译： 提供了一种装置。 该装置包括后端电路和冗余输入电路对。 每对冗余输入电路被配置为形成差分对晶体管，并且每个冗余输入电路包括多路复用器和一组晶体管。 多路复用器耦合到后端电路，并且来自该组晶体管的每个晶体管具有第一无源电极，第二无源电极和控制电极。 来自晶体管组的每个晶体管的第一无源电极耦合到多路复用器，并且来自该组晶体管的控制电极耦合在一起。

公开(公告)号：US08467749B2

公开(公告)日：2013-06-18

申请号：US12253205

申请日：2008-10-16

申请人： Mehmet T. Ozgun ,  Baher S. Haroun

发明人： Mehmet T. Ozgun ,  Baher S. Haroun

IPC分类号： H04B1/04

CPC分类号： H03F3/3022 ,  H03F1/32 ,  H03F3/195 ,  H03F3/245 ,  H03F2200/165 ,  H03F2200/333 ,  H03F2200/375 ,  H03F2200/378 ,  H03F2200/391 ,  H03F2200/399 ,  H03F2200/78

摘要： An FM-band transmit power amplifier and a method of transmitting in multiple bands. In one embodiment, the FM-band transmit power amplifier has an input and an output and includes: (1) a pre-filter including a charge-pump based integrator coupled to the input and a passive notch filter having a notch frequency in a band other than an FM band and (2) an output driver coupled between the passive pre-filter and the output and having PMOS and NMOS transconductors configured to receive an output from the passive filter.

摘要翻译： FM波段发射功率放大器以及多频段发射的方法。 在一个实施例中，FM波段发射功率放大器具有输入和输出，并且包括：（1）包括耦合到输入的基于电荷泵的积分器的预滤波器和在频带中具有陷波频率的无源陷波滤波器 （2）耦合在无源前置滤波器和输出端之间的输出驱动器，并且具有配置成从无源滤波器接收输出的PMOS和NMOS跨导器。

公开(公告)号：US08386865B2

公开(公告)日：2013-02-26

申请号：US13559251

申请日：2012-07-26

申请人： Baher S. Haroun ,  Lee D. Whetsel

发明人： Baher S. Haroun ,  Lee D. Whetsel

IPC分类号： G01R31/28

CPC分类号： G01R31/3177 ,  G01R31/2851 ,  G01R31/318536 ,  G01R31/318544 ,  G01R31/318555 ,  G01R31/318558 ,  G11C29/46

摘要： An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.

摘要翻译： 描述了用于在集成电路上测试多个电路的架构。 该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。

公开(公告)号：US20120304029A1

公开(公告)日：2012-11-29

申请号：US13559251

申请日：2012-07-26

申请人： Baher S. Haroun ,  Lee D. Whetsel

发明人： Baher S. Haroun ,  Lee D. Whetsel

IPC分类号： G01R31/3177 ,  G06F11/25

CPC分类号： G01R31/3177 ,  G01R31/2851 ,  G01R31/318536 ,  G01R31/318544 ,  G01R31/318555 ,  G01R31/318558 ,  G11C29/46

摘要： An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.

摘要翻译： 描述了用于在集成电路上测试多个电路的架构。 该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。

公开(公告)号：US08209650B2

公开(公告)日：2012-06-26

申请号：US12103961

申请日：2008-04-16

申请人： Ian St. John ,  Mohamed Kamal Mahmoud ,  Baher S. Haroun

发明人： Ian St. John ,  Mohamed Kamal Mahmoud ,  Baher S. Haroun

IPC分类号： G06F17/50

CPC分类号： G06F17/5063

摘要： A method of designing an analog integrated circuit (IC), a parasitic constraint analyzer and a method of determining a layout of an analog IC complies with parasitic constraints. In one embodiment, the method of designing an analog IC includes: (1) creating a schematic of an analog integrated circuit based on a set of specifications, (2) attaching parasitic constraints to the schematic, (3) creating a layout of the analog integrated circuit based on the schematic including the parasitic constraints, (4) extracting parasitic values from parasitic elements of the layout and (5) comparing the extracted parasitic values with the parasitic constraints to verify compliance therewith.

摘要翻译： 设计模拟集成电路（IC）的方法，寄生约束分析器和确定模拟IC的布局的方法符合寄生约束。 在一个实施例中，设计模拟IC的方法包括：（1）基于一组规范创建模拟集成电路的示意图，（2）将附加约束附加到原理图，（3）创建模拟 基于包括寄生约束的示意图的集成电路，（4）从布局的寄生元件提取寄生值，以及（5）将所提取的寄生值与寄生约束进行比较以验证其符合性。

公开(公告)号：US20110161757A1

公开(公告)日：2011-06-30

申请号：US13043763

申请日：2011-03-09

申请人： Baher S. Haroun ,  Lee D. Whetsel

发明人： Baher S. Haroun ,  Lee D. Whetsel

IPC分类号： G01R31/3177 ,  G06F11/25

CPC分类号： G01R31/3177 ,  G01R31/2851 ,  G01R31/318536 ,  G01R31/318544 ,  G01R31/318555 ,  G01R31/318558 ,  G11C29/46

摘要： An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test pins on the integrated circuit and 1149.1 Test Access Ports (TAP) of the plurality of circuits to be tested. The TAP Linking Module operates in response to 1149.1 scan operations from a tester connected to the test pins to selectively switch between 1149.1 TAPs to enable test access between the tester and plurality of circuits. The TAP Linking Module's 1149.1 TAP switching operation is based upon augmenting 1149.1 instruction patterns to affix an additional bit or bits of information which is used by the TAP Linking Module for performing the TAP switching operation.

摘要翻译： 描述了用于在集成电路上测试多个电路的架构。 该架构包括位于集成电路的测试引脚之间的TAP链接模块和待测试的多个电路的1149.1测试访问端口（TAP）。 TAP链接模块响应来自连接到测试引脚的测试仪的1149.1扫描操作，以选择性地在1149.1 TAP之间切换，以使测试仪和多个电路之间能够进行测试。 TAP链接模块的1149.1 TAP切换操作基于增加1149.1指令模式，以附加TAP链接模块用于执行TAP切换操作的附加位或位信息。