公开(公告)号：US11983537B1

公开(公告)日：2024-05-14

申请号：US18086458

申请日：2022-12-21

Applicant: CEREMORPHIC, INC.

Inventor： Venkat Mattela ,  Heonchul Park ,  Radhika Ponnamaneni ,  Govardhan Mattela

IPC: G06F9/38 ,  G06F9/30

CPC classification number: G06F9/3802 ,  G06F9/30101 ,  G06F9/382 ,  G06F9/3851 ,  G06F9/3873

Abstract: A multi-stage processor has a pre-fetch stage, and a sequence of pipelined processor stages. A thread map register contains thread identifiers, and a thread map valid register has locations corresponding to the thread map register and indicating whether a value in the thread map register is to be fetched or not, and a thread map length register indicates the number of thread map register locations forming a canonical sequence of thread identifiers to the pre-fetch stage. The pre-fetch stage does not act on a thread identifier with a not valid thread map valid value, thereby saving power in low demand conditions.

公开(公告)号：US11967350B1

公开(公告)日：2024-04-23

申请号：US17589739

申请日：2022-01-31

Applicant: Ceremorphic, Inc.

Inventor： Akshaykumar Salimath ,  Venkat Mattela ,  Sanghamitra Debroy

IPC: G11C11/00 ,  G11C11/16 ,  H10B61/00 ,  H10N50/10 ,  H10N52/00 ,  H10N52/80

CPC classification number: G11C11/1673 ,  H10B61/00 ,  H10N50/10 ,  H10N52/101 ,  H10N52/80

Abstract: A system and method for a memory device is disclosed. A substrate is provided. A nucleation pad is disposed over the substrate. A nanowire is disposed substantially perpendicular, about a center of the nucleation pad. A charge current is selectively passed through the substrate to nucleate a magnetic vortex in the nucleation pad, the magnetic vortex indicative of a magnetic domain and a direction of the magnetic vortex indicative of a polarity of the magnetic domain. A shift current is applied through the nanowire to shift the magnetic domain into the nanowire.

公开(公告)号：US11955973B1

公开(公告)日：2024-04-09

申请号：US17829109

申请日：2022-05-31

Applicant: Ceremorphic, Inc.

Inventor： Akshaykumar Salimath ,  Sanghamitra Debroy ,  Venkat Mattela

IPC: H03K19/20 ,  H03K19/18

CPC classification number: H03K19/20 ,  H03K19/18

Abstract: A system and method for a logic device is disclosed. A first nanotrack along a first axis and a second nanotrack along a second axis perpendicular to the first axis are disposed over a substrate. The second nanotrack is disposed over the first nanotrack in a overlap portion. An input value is defined about a first end of the first nanotrack and the second nanotrack by nucleating a skyrmion, wherein a presence of the skyrmion defines a first value and absence of the skyrmion defines a second value. The nucleated skyrmion moves towards the second end of the nanotracks when a charge current is passed through the first nanotrack and the second nanotrack along the second axis. The presence of the skyrmion sensed at the second end of the nanotrack indicates an output value of the first value.

公开(公告)号：US11800647B1

公开(公告)日：2023-10-24

申请号：US17734058

申请日：2022-04-30

Applicant: Ceremorphic, Inc.

Inventor： Akshaykumar Salimath ,  Sanghamitra Debroy ,  Venkat Mattela

IPC: H05K1/02 ,  H05K3/10

CPC classification number: H05K3/10 ,  H05K1/0296 ,  H05K2201/09236 ,  H05K2201/09245

Abstract: A system and method for a logic device is disclosed. A plurality of nanotracks are disposed over a substrate, along a first axis, with at least a left nanotrack, a right nanotrack and a middle nanotrack disposed between the left nanotrack and the right nanotrack. At least one connector nanotrack is disposed to connect two adjacent nanotracks. An input value is defined at a first end of the plurality of nanotracks by selectively nucleating a skyrmion at the first end. Presence of the skyrmion is indicative of a first value and absence of the skyrmion indictive of a second value. The nucleated skyrmion moves towards the second end of the nanotrack when a charge current is passed along the first axis. The presence of the skyrmion sensed at the second end of the middle nanotrack indicates an output value of the first value.