公开(公告)号：US12035637B2

公开(公告)日：2024-07-09

申请号：US17522012

申请日：2021-11-09

Applicant: SK keyfoundry Inc.

Inventor： Jungmun Jung

IPC: H10N52/00 ,  G01R33/07 ,  H10N52/01 ,  H10N52/80

CPC classification number: H10N52/101 ,  G01R33/077 ,  H10N52/01 ,  H10N52/80

Abstract: A semiconductor device including a CMOS process-based Hall sensor is provided. The semiconductor device which may include a N-type sensing region which is formed on a semiconductor substrate; P-type contact regions and N-type contact regions which are alternately formed in the N-type sensing region; a plurality of first trenches which are formed in contact with the P-type contact regions and have a first width; and a plurality of second trenches which separate the P-type contact regions and the N-type contact regions and have a second width less than the first width.

公开(公告)号：US11968842B2

公开(公告)日：2024-04-23

申请号：US17397302

申请日：2021-08-09

Applicant: National University of Singapore

Inventor： Jingsheng Chen ,  Liang Liu ,  Chenghang Zhou

IPC: H10B61/00 ,  H01F10/32 ,  H01F41/30 ,  H10N50/01 ,  H10N50/10 ,  H10N50/80 ,  H10N50/85 ,  H10N52/00 ,  H10N52/01

CPC classification number: H10B61/00 ,  H01F10/3254 ,  H01F10/3286 ,  H01F10/329 ,  H01F41/302 ,  H10N50/01 ,  H10N50/10 ,  H10N50/80 ,  H10N50/85 ,  H10N52/00 ,  H10N52/01 ,  H10N52/101

Abstract: A spin-orbit torque device is described. The spin-orbit torque device comprising an interfacing layer and a magnetic layer having a switchable magnetization direction. An interface is formed between the interfacing layer and the magnetic layer, the interface having a 3m1 crystallographic point group symmetry adapted to interact with an electric current to generate a spin torque for switching the magnetization direction of the magnetic layer. A method for fabricating the spin-orbit device and a method for switching the switchable magnetization of a spin-orbit torque device are also described.

公开(公告)号：US11864471B2

公开(公告)日：2024-01-02

申请号：US17514820

申请日：2021-10-29

Applicant: Texas Instruments Incorporated

Inventor： Rafael Jose Lizares Guevara ,  Dok Won Lee ,  Kashyap Mohan

IPC: G01R33/00 ,  H10N52/80 ,  G01R33/07 ,  H10N50/85 ,  H10N52/01 ,  H10N52/00

CPC classification number: H10N52/80 ,  G01R33/0011 ,  G01R33/07 ,  H10N50/85 ,  H10N52/01 ,  H10N52/101

Abstract: A described example includes: a semiconductor die including a Hall sensor arranged in a first plane that is parallel to a device side surface of the semiconductor die; a passivated magnetic concentrator including a magnetic alloy layer formed over the device side surface of the semiconductor die, the upper surface of the magnetic alloy layer covered by a layer of polymer material; a backside surface of the semiconductor die opposite the device side surface mounted to a die side surface of a die pad on a package substrate, the semiconductor die having bond pads on the device side surface spaced from the magnetic concentrator; electrical connections coupling the bond pads of the semiconductor die to leads of the package substrate; and mold compound covering the magnetic concentrator, the semiconductor die, the electrical connections, a portion of the leads, and the die side surface of the die pad.

公开(公告)号：US11864470B2

公开(公告)日：2024-01-02

申请号：US18173874

申请日：2023-02-24

Applicant: Lake Shore Cryotronics, Inc.

Inventor： David Daughton ,  Patrick Gleeson ,  Bo-Kuai Lai ,  Daniel Hoy

IPC: H10N52/00 ,  H10N50/85 ,  H10N52/01 ,  H10N52/80

CPC classification number: H10N52/101 ,  H10N50/85 ,  H10N52/01 ,  H10N52/80

Abstract: A magnetic field magnetic field sensor and method of making the sensor. The sensor and method of making the sensor may comprise a material or structure that prevents the admission of light in certain wavelengths to enhance the stability of the magnetic field sensor over a period of time. The sensor and method of making the sensor may comprise an adsorption prevention layer which protects the semiconductor portion of the magnetic. The sensor may also comprise an insulating layer formed between semiconductor layers and a substrate layer.

公开(公告)号：US20230296699A1

公开(公告)日：2023-09-21

申请号：US18051923

申请日：2022-11-02

Applicant: ROHM Co., LTD.

Inventor： Hirotoshi Kubo

IPC: G01R33/07 ,  H10N52/00 ,  H10N52/01

CPC classification number: G01R33/07 ,  H10N52/101 ,  H10N52/01

Abstract: Disclosed herein is a Hall sensor including a Hall element having a first principal surface, and a first magnetic body arranged on a side of the first principal surface, in which the first magnetic body has a first surface facing the first principal surface, and an area of a projection surface of the first magnetic body when viewed in plan from an opposite side of the Hall element is larger than an area of the first surface.

公开(公告)号：US20230273272A1

公开(公告)日：2023-08-31

申请号：US18311374

申请日：2023-05-03

Applicant: Melexis Technologies SA

Inventor： Appolonius Jacobus VAN DER WIEL

IPC: G01R33/00 ,  G01R33/02 ,  H01L23/522 ,  H01L23/528 ,  H01L23/58 ,  H10N52/01 ,  H10N52/80 ,  H10N52/00

CPC classification number: G01R33/0011 ,  G01R33/02 ,  H01L23/5226 ,  H01L23/528 ,  H01L23/58 ,  H10N52/01 ,  H10N52/80 ,  H10N52/101

Abstract: A magnetic flux concentrator (MFC) structure comprises a substrate, a first metal layer disposed on or over the substrate, and a second metal layer disposed on or over the first metal layer. Each metal layer comprises (i) a first wire layer comprising first wires conducting electrical signals, and (ii) a first dielectric layer disposed on the first wire layer. A magnetic flux concentrator is disposed at least partially in the first metal layer, in the second metal layer, or in both the first and the second metal layers. The structure can comprise an electronic circuit or a magnetic sensor with sensing plates. The structure can comprise a transformer or an electromagnet with suitable control circuits. The magnetic flux concentrator can comprise a metal stress-reduction layer in the first or second wire layers and a core formed by electroplating the stress-reduction layer.

公开(公告)号：US20230240153A1

公开(公告)日：2023-07-27

申请号：US18194766

申请日：2023-04-03

Applicant: Melexis Technologies SA

Inventor： Arnaud LAVILLE ,  Eric LAHAYE ,  Jian CHEN

IPC: H10N52/80 ,  G01R33/07 ,  H01L23/495 ,  H01L25/065 ,  H10N52/00

CPC classification number: H10N52/80 ,  G01R33/07 ,  H01L23/49541 ,  H01L23/49575 ,  H01L25/0657 ,  H10N52/101

Abstract: A sensor device comprising: a lead frame; a first/second semiconductor die having a first/second sensor structure at a first/second sensor location, and a plurality of first/second bond pads electrically connected to the lead frame; the semiconductor dies having a square or rectangular shape with a geometric center; the sensor locations are offset from the geometrical centers; the second die is stacked on top of the first die, and is rotated by a non-zero angle and optionally also offset or shifted with respect to the first die, such that a perpendicular projection of the first and second sensor location coincide.

公开(公告)号：US20230165165A1

公开(公告)日：2023-05-25

申请号：US18094631

申请日：2023-01-09

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Keith R. Green

IPC: H10N52/80 ,  H10N52/00

CPC classification number: H10N52/80 ,  H10N52/101 ,  H10B61/00

Abstract: A Hall sensor includes a Hall well, such as an implanted region in a surface layer of a semiconductor structure, and four doped regions spaced apart from one another in the implanted region. The implanted region and the doped regions include majority carriers of the same conductivity type. The sensor also includes a dielectric layer that extends over the implanted region, and an electrode layer over the dielectric layer to operate as a control gate to set or adjust the sensor performance. A first supply circuit provides a first bias signal to a first pair of the terminals, and a second supply circuit provides a second bias signal to the electrode layer.

公开(公告)号：US12048166B2

公开(公告)日：2024-07-23

申请号：US17295529

申请日：2019-11-21

Applicant: LFOUNDRY S.R.L.

Inventor： Carsten Schmidt ,  Mario Blasini ,  Gerhard Spitzlsperger ,  Alessandro Montagna

IPC: H10B61/00 ,  G01R33/07 ,  H01L21/768 ,  H01L23/48 ,  H01L25/065 ,  H10N52/00 ,  H10N52/01 ,  H10N52/80 ,  H10N59/00

CPC classification number: H10B61/00 ,  G01R33/072 ,  G01R33/077 ,  H01L21/76877 ,  H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H10N52/01 ,  H10N52/101 ,  H10N52/80 ,  H10N59/00

Abstract: A Hall integrated circuit including a vertical Hall element, having a first wafer and a second wafer, the second wafer including a CMOS substrate integrating a CMOS processing circuit coupled to the vertical Hall element and a stack of dielectric layers, and the first wafer including a Hall-sensor layer having a first surface and a second surface, the first and second wafers being bonded with the interposition of a dielectric layer arranged above the first surface of the Hall-sensor layer. The vertical Hall element has: at least a first Hall terminal; at least a second Hall terminal; a deep trench isolation ring extending through the Hall-sensor layer from the first surface to the second surface and enclosing and isolating a Hall sensor region of the Hall-sensor layer; and a first and a second conductive structures electrically connected to respective contact pads embedded in the stack of the second wafer.

公开(公告)号：US20240210497A1

公开(公告)日：2024-06-27

申请号：US18146447

申请日：2022-12-26

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Daiki Komatsu ,  Masamitsu Matsuura

IPC: G01R33/07 ,  H10N52/00 ,  H10N52/01

CPC classification number: G01R33/077 ,  H10N52/01 ,  H10N52/101

Abstract: An integrated circuit (IC) package comprises a semiconductor die having a first surface with a Hall-effect sensor circuit and a second surface. A plurality of through substrate vias (TSV) each having a metal layer extend from the first surface of the semiconductor die to the second surface. The IC package includes a portion of a leadframe having a first set of leads and a second set of leads. The first set of leads provide a field generating current path for directing a magnetic field toward the Hall-effect sensor circuit. The second set of leads are attached to bond pads on the semiconductor die. A first side of an insulator is attached to the leadframe using a die attach material, and a second side of the insulator is attached to the first side of the semiconductor die using a bonding material.