Bandgap tuned vertical color imager cell
    22.
    发明授权
    Bandgap tuned vertical color imager cell 有权
    带隙调谐垂直彩色成像器单元

    公开(公告)号:US06646318B1

    公开(公告)日:2003-11-11

    申请号:US10219836

    申请日:2002-08-15

    CPC classification number: H04N9/045 H01L27/14647 H04N5/3696

    Abstract: A combination of materials is used to form the photodiodes of a vertical color imager cell. The materials used to form the photodiodes have different band gaps that allow the photon absorption rates of the photodiodes to be adjusted. By adjusting the photon absorption rates, the sensitivities of the photodiodes and thereby the characteristics of the imager can be adjusted.

    Abstract translation: 使用材料的组合来形成垂直彩色成像器单元的光电二极管。 用于形成光电二极管的材料具有不同的带隙,允许调整光电二极管的光子吸收速率。 通过调整光子吸收率,可以调节光电二极管的灵敏度,从而调整成像器的特性。

    Wedge-shaped high density capacitor and method of making the capacitor
    23.
    发明授权
    Wedge-shaped high density capacitor and method of making the capacitor 有权
    楔形高密度电容器和制造电容器的方法

    公开(公告)号:US06639784B1

    公开(公告)日:2003-10-28

    申请号:US10283810

    申请日:2002-10-30

    CPC classification number: H01L28/91 H01L27/0805

    Abstract: A capacitor structure is formed in a wedge-shaped trench by forming alternating layers of insulating material and conductive material in the trench such that each layer of conductive material formed in the trench is electrically isolated from adjacent layers of conductive material formed in the trench. A first electrical contact is formed to electrically link in parallel a first set of alternating layers of conductive material. A second electrical contact is formed to electrically link in parallel a second set of alternating layers of conductive material. The two electrically isolated sets of inter-linked layers of conductive material define the interdigitated capacitor structure.

    Abstract translation: 电容器结构通过在沟槽中形成绝缘材料和导电材料的交替层而形成在楔形沟槽中,使得形成在沟槽中的每个导电材料层与在沟槽中形成的导电材料的相邻层电隔离。 形成第一电接触以平行地电连接导电材料的第一组交替层。 形成第二电接触以平行地电连接第二组交替的导电材料层。 导电材料的两个电隔离的相互连接的层限定了交叉指向的电容器结构。

    Dual direction ESD clamp based on snapback NMOS cell with embedded SCR
    26.
    发明授权
    Dual direction ESD clamp based on snapback NMOS cell with embedded SCR 有权
    基于具有嵌入式SCR的快速恢复NMOS单元的双向ESD钳位

    公开(公告)号:US07394133B1

    公开(公告)日:2008-07-01

    申请号:US11216774

    申请日:2005-08-31

    CPC classification number: H01L27/0262 H01L29/0692 H01L29/7436 H01L29/87

    Abstract: In an ESD protection structure, dual direction ESD protection is provided by forming an n-well isolation ring around an NMOS device so that the p-well in which the NMOS drain is formed is isolated from the underlying p-substrate by the n-well isolation ring. By forming the n-well isolation ring the p-n-p-n structure of an embedded SCR for reverse ESD protection is provided. The width of the n-well isolation ring and its spacing from the NMOS drain are adjusted to provide the desired SCR parameters.

    Abstract translation: 在ESD保护结构中,通过在NMOS器件周围形成n阱隔离环来提供双向ESD保护,使得形成NMOS漏极的p阱通过n阱与下面的p衬底隔离 隔离环。 通过形成n阱隔离环,提供了用于反向ESD保护的嵌入式SCR的p-n-p-n结构。 调整n阱隔离环的宽度及其与NMOS漏极的间隔,以提供所需的SCR参数。

    Apparatus and method for storing analog information in EEPROM memory
    27.
    发明授权
    Apparatus and method for storing analog information in EEPROM memory 有权
    用于将模拟信息存储在EEPROM存储器中的装置和方法

    公开(公告)号:US07233521B1

    公开(公告)日:2007-06-19

    申请号:US11078761

    申请日:2005-03-11

    CPC classification number: G11C27/005 G11C11/5621 G11C16/0441 G11C16/10

    Abstract: A storage device that is capable of receiving an analog signal and storing it as a digital signal. The storage device includes an input node configured to receive an analog input voltage and two non-volatile storage cells. A second non-volatile memory cell is coupled to receive the analog input signal from the input node. The second non-volatile memory cell is capable of being programmed to a one of a plurality of programming states. The first non-volatile memory cell, which is coupled to the second non-volatile memory cell, is also capable of being programmed to one of a plurality of programming states. During operation, the second non-volatile memory cell and the first non-volatile memory cell are both programmed to a selected second programming state indicative of the magnitude of the analog input voltage. The first programming state and the second programming state are together are indicative of a digital value commensurate with the magnitude of the analog input voltage.

    Abstract translation: 一种能够接收模拟信号并将其存储为数字信号的存储装置。 存储装置包括被配置为接收模拟输入电压的输入节点和两个非易失性存储单元。 第二非易失性存储单元被耦合以从输入节点接收模拟输入信号。 第二非易失性存储单元能够被编程为多个编程状态之一。 耦合到第二非易失性存储单元的第一非易失性存储单元也能够被编程为多个编程状态之一。 在操作期间,第二非易失性存储器单元和第一非易失性存储器单元都被编程为指示模拟输入电压的大小的选择的第二编程状态。 第一编程状态和第二编程状态一起表示与模拟输入电压的大小相称的数字值。

    Imaging cell that has a long integration period and method of operating the imaging cell
    28.
    发明授权
    Imaging cell that has a long integration period and method of operating the imaging cell 有权
    成像细胞具有长的积分期和操作成像细胞的方法

    公开(公告)号:US07218555B2

    公开(公告)日:2007-05-15

    申请号:US11242094

    申请日:2005-10-03

    Abstract: The integration period of an imaging cell, or the time that an imaging cell is exposed to light energy, is substantially increased by utilizing a single-poly, electrically-programmable, read-only-memory (EPROM) structure to capture the light energy. Photogenerated electrons are formed in the channel region of the EPROM structure from the light energy. The photogenerated electrons are then accelerated into having ionizing collisions which, in turn, leads to electrons being injected onto the floating gate of the EPROM structure at a rate that is proportionate to the number of photons captured by the channel region.

    Abstract translation: 成像单元的积分周期或成像单元暴露于光能的时间通过利用单聚电子可编程只读存储器(EPROM)结构捕获光能而大大增加。 光能从EPROM结构的沟道区形成光电子。 光生成的电子然后被加速成具有电离碰撞,其进而导致电子以与通道区域捕获的光子数成正比的速率注入到EPROM结构的浮动栅极上。

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