公开(公告)号：US20090108354A1

公开(公告)日：2009-04-30

申请号：US12256541

申请日：2008-10-23

申请人： Hiroyuki FUJIMOTO

发明人： Hiroyuki FUJIMOTO

IPC分类号： H01L47/00 ,  H01L21/336

CPC分类号： H01L29/66818 ,  H01L21/823431 ,  H01L21/823437 ,  H01L29/785

摘要： A polysilicon film is formed all over a surface of a semiconductor substrate, then is subject to a CMP process through a mask pattern as a stopper. Then, a metal film is formed all over the resulting surface, and is allowed at least a part of the polysilicon film and at least a part of the metal film to react with each other to silicidize the metal. This forms the gate electrode.

摘要翻译： 在半导体衬底的整个表面上形成多晶硅膜，然后通过掩模图案作为阻挡层进行CMP工艺。 然后，在整个所得表面上形成金属膜，并允许多晶硅膜的至少一部分和金属膜的至少一部分彼此反应以使金属硅化。 这形成栅电极。

公开(公告)号：US20090152611A1

公开(公告)日：2009-06-18

申请号：US12332649

申请日：2008-12-11

申请人： Hiroyuki FUJIMOTO

发明人： Hiroyuki FUJIMOTO

IPC分类号： H01L23/48 ,  H01L29/78 ,  H01L21/44 ,  H01L21/3205 ,  H01L21/336

CPC分类号： H01L29/7827 ,  H01L21/6835 ,  H01L21/76897 ,  H01L21/76898 ,  H01L21/823475 ,  H01L21/823487 ,  H01L23/481 ,  H01L23/522 ,  H01L29/66666 ,  H01L29/78642 ,  H01L2221/68372 ,  H01L2924/0002 ,  H01L2924/19041 ,  H01L2924/00

摘要： A semiconductor device comprises a first contact plug, a first structure and a second insulating layer, or comprises a first contact plug, a first structure, a protruding region and a second insulating layer. The first contact plug extends in a predetermined direction and including a step converting a cross section area of the first contact plug perpendicular to the predetermined direction discontinuously via the step in one end side. The second insulating layer is formed on side surface of a part of the first contact plug closer to the first structure than the step, or on side surfaces of the protruding region and a part of the first contact plug closer to the first structure than the step.

摘要翻译： 半导体器件包括第一接触插塞，第一结构和第二绝缘层，或包括第一接触插塞，第一结构，突出区域和第二绝缘层。 第一接触插塞沿预定方向延伸，并且包括通过一端侧的台阶不连续地将第一接触插塞的横截面垂直于预定方向不连续地转换的台阶。 第二绝缘层形成在第一接触插塞的比台阶更靠近第一结构的一部分的侧表面上，或者在突出区域的侧表面和第一接触插塞的比第一结构更靠近第一结构的部分 。

公开(公告)号：US20090087869A1

公开(公告)日：2009-04-02

申请号：US12208735

申请日：2008-09-11

申请人： Hiroyuki FUJIMOTO ,  Miyuki Matsue

发明人： Hiroyuki FUJIMOTO ,  Miyuki Matsue

IPC分类号： G01N33/53 ,  G01N33/78

CPC分类号： G01N33/54306 ,  G01N33/76

摘要： The invention provides a method of sandwich immunoassay comprising steps of, (a) forming a complex of an antigen and a first antibody by contacting the antigen with the first antibody which recognizes the antigen and which is labeled by a detectable labeling substance; and (b) fixing the complex formed in the step (a) to a solid phase by using a second antibody which recognizes the antigen and which is capable of binding to the solid phase, as well as a method for detecting an antigen in an analyte by using a method of sandwich immunoassay.

摘要翻译： 本发明提供了一种夹心免疫测定方法，包括以下步骤：（a）通过使抗原与识别抗原的第一抗体接触并通过可检测的标记物质标记形成抗原和第一抗体的复合物; 和（b）通过使用识别抗原并能够结合固相的第二抗体将步骤（a）中形成的复合物固定成固相，以及检测分析物中的抗原的方法 通过使用夹心免疫测定法。

公开(公告)号：US20090078993A1

公开(公告)日：2009-03-26

申请号：US12235663

申请日：2008-09-23

申请人： Hiroyuki FUJIMOTO

发明人： Hiroyuki FUJIMOTO

IPC分类号： H01L47/00

CPC分类号： H01L29/7827 ,  H01L27/10808 ,  H01L27/10873 ,  H01L29/66666

摘要： A semiconductor device includes a vertically extending semiconductor portion above a semiconductor substrate, first and second diffusion regions being disposed near the bottom and top portions of the vertically extending semiconductor portion, respectively. A gate insulating film extends along the side surface of the vertically extending semiconductor portion which is separated by the gate insulating film from a gate electrode. The level of the top portion of the gate electrode is nearly equal to or lower than the level of the bottom portion of the second diffusion regions and the level of the bottom portion of the gate electrode is nearly equal to or higher than the level of the top portion of the first diffusion region.

摘要翻译： 半导体器件包括在半导体衬底之上的垂直延伸的半导体部分，第一和第二扩散区分别设置在垂直延伸的半导体部分的底部和顶部附近。 栅极绝缘膜沿着由栅极绝缘膜与栅电极分离的垂直延伸的半导体部分的侧表面延伸。 栅电极的顶部的电平几乎等于或低于第二扩散区的底部的电平，并且栅电极的底部的电平几乎等于或高于 第一扩散区域的顶部。

公开(公告)号：US20080231287A1

公开(公告)日：2008-09-25

申请号：US12050453

申请日：2008-03-18

申请人： Hiroyuki FUJIMOTO

发明人： Hiroyuki FUJIMOTO

IPC分类号： G01R31/28 ,  G01R31/26

CPC分类号： G01R31/307

摘要： An evaluation board, on which is mounted a chip to be evaluated is provided. Particularly, the evaluation board includes a monitoring window for monitoring a power supply part, a ground part, and a surface of the chip, a first signal input part for inputting signals to the chip, and a second signal input part for inputting signals to the chip, wherein the second signal input part is placed as to sandwich said monitoring window between itself and the first signal input part.

摘要翻译： 提供了一个评估板，其上安装了待评估的芯片。 特别地，评估板包括用于监视电源部分，接地部分和芯片表面的监视窗口，用于向芯片输入信号的第一信号输入部分和用于向芯片输入信号的第二信号输入部分 芯片，其中第二信号输入部分被放置为将所述监视窗口夹在其自身与第一信号输入部分之间。