公开(公告)号：US20090087869A1

公开(公告)日：2009-04-02

申请号：US12208735

申请日：2008-09-11

申请人： Hiroyuki FUJIMOTO ,  Miyuki Matsue

发明人： Hiroyuki FUJIMOTO ,  Miyuki Matsue

IPC分类号： G01N33/53 ,  G01N33/78

CPC分类号： G01N33/54306 ,  G01N33/76

摘要： The invention provides a method of sandwich immunoassay comprising steps of, (a) forming a complex of an antigen and a first antibody by contacting the antigen with the first antibody which recognizes the antigen and which is labeled by a detectable labeling substance; and (b) fixing the complex formed in the step (a) to a solid phase by using a second antibody which recognizes the antigen and which is capable of binding to the solid phase, as well as a method for detecting an antigen in an analyte by using a method of sandwich immunoassay.

摘要翻译： 本发明提供了一种夹心免疫测定方法，包括以下步骤：（a）通过使抗原与识别抗原的第一抗体接触并通过可检测的标记物质标记形成抗原和第一抗体的复合物; 和（b）通过使用识别抗原并能够结合固相的第二抗体将步骤（a）中形成的复合物固定成固相，以及检测分析物中的抗原的方法 通过使用夹心免疫测定法。

公开(公告)号：US20120313156A1

公开(公告)日：2012-12-13

申请号：US13592865

申请日：2012-08-23

申请人： Hiroyuki FUJIMOTO ,  Shinpei IIJIMA

发明人： Hiroyuki FUJIMOTO ,  Shinpei IIJIMA

IPC分类号： H01L27/06

CPC分类号： H01L27/10876 ,  H01L21/76897 ,  H01L27/10823 ,  H01L27/10855 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/861

摘要： A method of forming a semiconductor device includes the following processes. A pillar is formed which stands on a semiconductor substrate. A first insulating film is formed which covers a side surface of the pillar. An upper portion of the first insulating film is removed to expose a side surface of an upper portion of the pillar. A contact plug is formed, which contacts the side surface of the upper portion of the pillar and a top surface of the pillar.

摘要翻译： 形成半导体器件的方法包括以下处理。 在半导体衬底上形成立柱。 形成覆盖柱的侧面的第一绝缘膜。 去除第一绝缘膜的上部以暴露柱的上部的侧表面。 形成接触插塞，其接触柱的上部的侧表面和柱的顶表面。

公开(公告)号：US20110094818A1

公开(公告)日：2011-04-28

申请号：US12604423

申请日：2009-10-23

申请人： Yasuhiro SUZUKI ,  Takehiko ARAI ,  Hiroyuki FUJIMOTO ,  Yasuhiro OISHI

发明人： Yasuhiro SUZUKI ,  Takehiko ARAI ,  Hiroyuki FUJIMOTO ,  Yasuhiro OISHI

IPC分类号： B60K5/02 ,  B60K5/00 ,  B60K17/08 ,  B60K17/342

CPC分类号： B60K5/02 ,  B60K11/06 ,  B60K13/02 ,  B60K17/342 ,  B60K2005/003 ,  B60Y2200/20 ,  B60Y2400/72

摘要： In an all terrain vehicle, an engine body of an engine unit is positioned along a center line that is perpendicular or substantially perpendicular to a transverse direction of the vehicle. A continuously variable transmission of the engine unit is disposed transversely lateral to the engine body. A center console includes an inner space. The center console is disposed in a transverse center portion of a cabin space. The center console connects a space positioned forward of a front panel and a space positioned under a seat. An intake duct is connected to an upper surface of the engine unit, and extends forward therefrom. The intake duct is at least partially disposed in the interior of the center console. An exhaust duct is connected to the engine unit, and extends rearward therefrom.

摘要翻译： 在全地形车辆中，发动机单元的发动机体沿着与车辆的横向方向垂直或基本垂直的中心线定位。 发动机单元的无级变速器设置在发动机主体的横向横向。 中央控制台包含内部空间。 中央控制台设置在舱室空间的横向中心部分。 中央控制台连接一个位于前面板前方的空间和一个位于座位下方的空间。 进气管连接到发动机单元的上表面并从其向前延伸。 进气管道至少部分地设置在中控台的内部。 排气管连接到发动机单元并从其向后延伸。

公开(公告)号：US20100148233A1

公开(公告)日：2010-06-17

申请号：US12637480

申请日：2009-12-14

申请人： Hiroyuki FUJIMOTO

发明人： Hiroyuki FUJIMOTO

IPC分类号： H01L27/105 ,  H01L21/8239 ,  H01L27/06

CPC分类号： H01L27/10885 ,  H01L27/108 ,  H01L27/10802 ,  H01L27/10876 ,  H01L29/7841

摘要： A semiconductor device include a semiconductor substrate comprising a substrate body, a base over the substrate body and a pillar over a first region of the base; a buried line adjacent to a side surface of the base; a first diffusion layer over a second region of the base; a second diffusion layer over the pillar, the second diffusion layer being higher in level than the first diffusion layer; and a third diffusion layer disposed between the buried line and the semiconductor substrate. The third diffusion layer is different in level from the first diffusion layer. The top level of the third diffusion layer is lower than the top level of the first diffusion layer.

摘要翻译： 半导体器件包括半导体衬底，其包括衬底主体，衬底上的基底和位于基底的第一区域上的柱; 邻近基底的侧表面的掩埋线; 在所述基底的第二区域上的第一扩散层; 在所述柱上方的第二扩散层，所述第二扩散层的水平高于所述第一扩散层; 以及设置在所述掩埋线和所述半导体衬底之间的第三扩散层。 第三扩散层的水平与第一扩散层不同。 第三扩散层的顶层低于第一扩散层的顶层。

公开(公告)号：US20100140688A1

公开(公告)日：2010-06-10

申请号：US12630241

申请日：2009-12-03

申请人： Hiroyuki FUJIMOTO

发明人： Hiroyuki FUJIMOTO

IPC分类号： H01L29/78 ,  H01L27/088 ,  H01L21/8234

CPC分类号： H01L27/11521 ,  H01L21/823437 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/42356 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/66666 ,  H01L29/7827

摘要： A semiconductor device includes a first semiconductor pillar, a first insulating film covering a side face of the first semiconductor pillar, a first electrode covering the first insulating film, a second semiconductor pillar, a second insulating film covering a side face of the second semiconductor pillar, and a second electrode covering the second insulating film. The top level of the second electrode is higher than the top level of the first electrode.

摘要翻译： 半导体器件包括第一半导体柱，覆盖第一半导体柱的侧面的第一绝缘膜，覆盖第一绝缘膜的第一电极，第二半导体柱，覆盖第二半导体柱的侧面的第二绝缘膜 以及覆盖第二绝缘膜的第二电极。 第二电极的顶层高于第一电极的顶层。

公开(公告)号：US20110143509A1

公开(公告)日：2011-06-16

申请号：US12964777

申请日：2010-12-10

申请人： Hiroyuki FUJIMOTO

发明人： Hiroyuki FUJIMOTO

IPC分类号： H01L21/336 ,  H01L21/28

CPC分类号： H01L27/10876 ,  H01L27/0207

摘要： A method of forming a semiconductor device includes the following processes. A groove is formed in a semiconductor substrate. A gate insulating film is formed on an inside wall of the groove. A buried gate electrode is formed on the gate insulating film and on a bottom portion of the groove. A cap insulating film covering the buried gate electrode is formed in an upper portion of the groove. The cap insulating film has a top surface which is different in level from a top surface of the semiconductor substrate. A first inter-layer insulating film is formed on the top surface of the semiconductor substrate and on the top surface of the cap insulating film. The first inter-layer insulating film with a flat top surface fills a gap in level between the top surface of the semiconductor substrate and the top surface of the cap insulating film.

摘要翻译： 形成半导体器件的方法包括以下处理。 在半导体衬底中形成凹槽。 栅极绝缘膜形成在槽的内壁上。 掩模栅极形成在栅极绝缘膜上和沟槽的底部。 覆盖掩埋栅电极的帽绝缘膜形成在槽的上部。 帽绝缘膜具有与半导体衬底的顶表面不同的顶表面。 第一层间绝缘膜形成在半导体衬底的顶表面和帽绝缘膜的顶表面上。 具有平坦顶表面的第一层间绝缘膜填充半导体衬底的顶表面和帽绝缘膜的顶表面之间的间隙。

公开(公告)号：US20110033994A1

公开(公告)日：2011-02-10

申请号：US12850092

申请日：2010-08-04

申请人： Hiroyuki FUJIMOTO ,  Shinpei IIJIMA

发明人： Hiroyuki FUJIMOTO ,  Shinpei IIJIMA

IPC分类号： H01L21/336 ,  H01L21/28

CPC分类号： H01L27/10876 ,  H01L21/76897 ,  H01L27/10823 ,  H01L27/10855 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/861

摘要： A method of forming a semiconductor device includes the following processes. A pillar is formed which stands on a semiconductor substrate. A first insulating film is formed which covers a side surface of the pillar. An upper portion of the first insulating film is removed to expose a side surface of an upper portion of the pillar. A contact plug is formed, which contacts the side surface of the upper portion of the pillar and a top surface of the pillar.

摘要翻译： 形成半导体器件的方法包括以下处理。 在半导体衬底上形成立柱。 形成覆盖柱的侧面的第一绝缘膜。 去除第一绝缘膜的上部以暴露柱的上部的侧表面。 形成接触插塞，其接触柱的上部的侧表面和柱的顶表面。

公开(公告)号：US20100330774A1

公开(公告)日：2010-12-30

申请号：US12873802

申请日：2010-09-01

申请人： Hiroyuki FUJIMOTO ,  Yoshihiro TAKAISHI

发明人： Hiroyuki FUJIMOTO ,  Yoshihiro TAKAISHI

IPC分类号： H01L21/762

CPC分类号： H01L21/76229

摘要： A semiconductor device may include, but is not limited to, first and second well regions, and a well isolation region isolating the first and second well regions. The first and second well regions each may include an active region, a device isolation groove that defines the active region, and a device isolation insulating film that fills the device isolation groove. The first and second well regions may include first and second well layers, respectively. The well isolation region may include a well isolation groove, a well isolation insulating film that fills the well isolation groove, and a diffusion stopper layer disposed under a bottom of the well isolation groove. The first and second well layers have first and second bottoms respectively, which are deeper in depth than a bottom of the device isolation groove and shallower in depth than the bottom of the well isolation groove.

摘要翻译： 半导体器件可以包括但不限于第一和第二阱区以及隔离第一阱区和第二阱区的阱隔离区。 第一和第二阱区域各自可以包括有源区域，限定有源区域的器件隔离沟槽和填充器件隔离沟槽的器件隔离绝缘膜。 第一和第二阱区域可以分别包括第一和第二阱层。 阱隔离区域可以包括井隔离槽，填充阱隔离槽的阱隔离绝缘膜和设置在阱隔离槽的底部下方的扩散阻挡层。 第一和第二阱层分别具有第一和第二底部，其深度比器件隔离槽的底部深，并且深度比阱隔离槽的底部深。

公开(公告)号：US20090212365A1

公开(公告)日：2009-08-27

申请号：US12360165

申请日：2009-01-27

申请人： Hiroyuki FUJIMOTO ,  Yuki TOGASHI

发明人： Hiroyuki FUJIMOTO ,  Yuki TOGASHI

IPC分类号： H01L29/78 ,  H01L21/20

CPC分类号： H01L23/535 ,  H01L21/28525 ,  H01L21/76879 ,  H01L21/84 ,  H01L27/0688 ,  H01L29/66772 ,  H01L29/7828 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: a monocrystalline substrate; an inter-layer film formed on the monocrystalline substrate; a contact hole penetrating the inter-layer film and partially exposing an upper surface of the monocrystalline substrate; a sidewall formed on an inner surface of the contact hole; a plurality of first monocrystalline layers which include few defects, fill the contact hole, and cover the inter-layer film; and a plurality of second monocrystalline layers which include many defects and cover the sidewall and an upper surface of the inter-layer film so as to be sandwiched between the first monocrystalline layers and the inter-layer film.

摘要翻译： 半导体器件包括：单晶衬底; 形成在单晶衬底上的层间膜; 穿透层间膜并且部分地暴露单晶衬底的上表面的接触孔; 形成在所述接触孔的内表面上的侧壁; 包含少量缺陷的多个第一单晶层，填充接触孔，并覆盖层间膜; 以及包含许多缺陷并覆盖层间膜的侧壁和上表面的多个第二单晶层，以夹在第一单晶层和层间膜之间。

公开(公告)号：US20090007887A1

公开(公告)日：2009-01-08

申请号：US12164385

申请日：2008-06-30

申请人： Hiroyuki FUJIMOTO ,  Hiroshi KAWAZOE

发明人： Hiroyuki FUJIMOTO ,  Hiroshi KAWAZOE

IPC分类号： F02M51/06

CPC分类号： F02M51/0657 ,  F02M61/042 ,  F02M61/166

摘要： A fuel injection valve is provided with a main body and a valve member. The main body has a fuel passage and a fuel injection opening formed at the downstream-end of the fuel passage. The valve member is provided in the fuel passage. The valve member is configured to move between a first position in which the valve member closes the fuel injection opening and a second position in which the valve member opens the fuel injection opening. A hardened layer is formed on abutment surfaces of the valve member and the main body that abut with each other. The hardness of this hardened layer is lower in its surface side than in its bottom side. According to this structure, the stress generated inside the hardened layer is suppressed, and breakage and detachment of the hardened layer are prevented.

摘要翻译： 燃料喷射阀设置有主体和阀构件。 主体具有形成在燃料通道的下游端的燃料通道和燃料喷射开口。 阀构件设置在燃料通道中。 阀构件构造成在阀构件关闭燃料喷射开口的第一位置和阀构件打开燃料喷射开口的第二位置之间移动。 在彼此抵接的阀构件和主体的邻接表面上形成硬化层。 该硬化层的表面侧的硬度比底面的硬度低。 根据该结构，能够抑制硬化层内部产生的应力，能够防止硬化层的断裂和剥离。