公开(公告)号：US07960808B2

公开(公告)日：2011-06-14

申请号：US11844109

申请日：2007-08-23

申请人： Geoffrey W. Burr ,  Chandrasekharan Kothandaraman ,  Chung Hon Lam ,  Xiao Hu Liu ,  Stephen M. Rossnagel ,  Christy S. Tyberg ,  Robert L. Wisnieff

发明人： Geoffrey W. Burr ,  Chandrasekharan Kothandaraman ,  Chung Hon Lam ,  Xiao Hu Liu ,  Stephen M. Rossnagel ,  Christy S. Tyberg ,  Robert L. Wisnieff

IPC分类号： H01L29/00

CPC分类号： H01L23/5256 ,  H01L23/5252 ,  H01L45/06 ,  H01L45/1206 ,  H01L45/1226 ,  H01L45/1286 ,  H01L45/1293 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1683 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A reversible fuse structure in an integrated circuit is obtained through the implementation of a fuse cell having a short thin line of phase change materials in contact with via and line structures capable of passing current through the line of phase change material (fuse cell). The current is passed through the fuse cell in order to change the material from a less resistive material to a more resistive material through heating the phase change material in the crystalline state to the melting point then quickly quenching the material into the amorphous state. The reversible programming is achieved by passing a lower current through the fuse cell to convert the high resistivity amorphous material to a lower resistivity crystalline material. Appropriate sense-circuitry is integrated to read the information stored in the fuses, wherein said sense circuitry is used to enable or disable circuitry.

摘要翻译： 集成电路中的可逆熔丝结构通过实现具有短路相变材料的熔断电池获得，所述相变材料与能够使电流通过相变材料线（熔丝电池）的通孔和线结构相接触。 电流通过熔丝电池，以便通过将结晶状态的相变材料加热至熔点，从而将材料从较小电阻的材料转变为更电阻的材料，然后快速将材料淬火成非晶状态。 可逆编程通过使较低电流通过熔丝电池来实现，以将高电阻率无定形材料转换成较低电阻率的晶体材料。 集成适当的感测电路以读取存储在熔丝中的信息，其中所述感测电路用于启用或禁用电路。

公开(公告)号：US07488967B2

公开(公告)日：2009-02-10

申请号：US11100312

申请日：2005-04-06

申请人： Geoffrey W. Burr ,  Chung Hon Lam ,  Simone Raoux ,  Stephen M. Rossnagel ,  Alejandro G. Schrott ,  Jonathan Z. Sun ,  Hemantha K. Wickramasinghe

发明人： Geoffrey W. Burr ,  Chung Hon Lam ,  Simone Raoux ,  Stephen M. Rossnagel ,  Alejandro G. Schrott ,  Jonathan Z. Sun ,  Hemantha K. Wickramasinghe

IPC分类号： H01L29/02

CPC分类号： H01L45/1683 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/144

摘要： Disclosed are a phase change memory cell and a method of forming the memory cell. The memory cell comprises a main body of phase change material connected directly to a bottom contact and via a narrow channel of phase change material to a top contact. The channel is tapered from the top contact towards the main body. A minimum width of the channel has a less than minimum lithographic dimension and is narrower than a width of the main body. Therefore, the channel provides a confined region for the switching current path and restricts phase changing to within the channel. In addition an embodiment of the memory cell isolates the main body of phase change material by providing a space between the phase change material and the cell walls. The space allows the phase change material to expand and contract and also limits heat dissipation.

摘要翻译： 公开了相变存储单元和形成存储单元的方法。 存储单元包括相变材料的主体，其直接连接到底部触点，并经由相位改变材料的窄通道连接到顶部触点。 通道从顶部触点向主体逐渐变细。 通道的最小宽度具有小于最小光刻尺寸，并且窄于主体的宽度。 因此，该通道为开关电流路径提供一个限制区域，并将相位变化限制在通道内。 此外，存储器单元的实施例通过在相变材料和单元壁之间提供空间来隔离相变材料的主体。 该空间允许相变材料膨胀和收缩，并且还限制了散热。

公开(公告)号：US08278155B2

公开(公告)日：2012-10-02

申请号：US13100456

申请日：2011-05-04

申请人： Geoffrey W. Burr ,  Chandrasekharan Kothandaraman ,  Chung Hon Lam ,  Xiao Hu Liu ,  Stephen M. Rossnagel ,  Christy S. Tyberg ,  Robert L. Wisnieff

发明人： Geoffrey W. Burr ,  Chandrasekharan Kothandaraman ,  Chung Hon Lam ,  Xiao Hu Liu ,  Stephen M. Rossnagel ,  Christy S. Tyberg ,  Robert L. Wisnieff

IPC分类号： H01L21/82 ,  H01L21/326 ,  H01L21/479

CPC分类号： H01L23/5256 ,  H01L23/5252 ,  H01L45/06 ,  H01L45/1206 ,  H01L45/1226 ,  H01L45/1286 ,  H01L45/1293 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1683 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A reversible fuse structure in an integrated circuit is obtained through the implementation of a fuse cell having a short thin line of phase change materials in contact with via and line structures capable of passing current through the line of phase change material (fuse cell). The current is passed through the fuse cell in order to change the material from a less resistive material to a more resistive material through heating the phase change material in the crystalline state to the melting point then quickly quenching the material into the amorphous state. The reversible programming is achieved by passing a lower current through the fuse cell to convert the high resistivity amorphous material to a lower resistivity crystalline material. Appropriate sense-circuitry is integrated to read the information stored in the fuses, wherein said sense circuitry is used to enable or disable circuitry.

摘要翻译： 集成电路中的可逆熔丝结构通过实现具有短路相变材料的熔断电池获得，所述相变材料与能够使电流通过相变材料线（熔丝电池）的通孔和线结构相接触。 电流通过熔丝电池，以便通过将结晶状态的相变材料加热至熔点，从而将材料从较小电阻的材料转变为更电阻的材料，然后快速将材料淬火成非晶状态。 可逆编程通过使较低电流通过熔丝电池来实现，以将高电阻率无定形材料转换成较低电阻率的晶体材料。 集成适当的感测电路以读取存储在熔丝中的信息，其中所述感测电路用于启用或禁用电路。

公开(公告)号：US07388273B2

公开(公告)日：2008-06-17

申请号：US11152750

申请日：2005-06-14

申请人： Geoffrey W. Burr ,  Chandrasekharan Kothandaraman ,  Chung Hon Lam ,  Xiao Hu Liu ,  Stephen M. Rossnagel ,  Christy S. Tyberg ,  Robert L. Wisnieff

发明人： Geoffrey W. Burr ,  Chandrasekharan Kothandaraman ,  Chung Hon Lam ,  Xiao Hu Liu ,  Stephen M. Rossnagel ,  Christy S. Tyberg ,  Robert L. Wisnieff

IPC分类号： H01L29/00

CPC分类号： H01L23/5256 ,  H01L23/5252 ,  H01L45/06 ,  H01L45/1206 ,  H01L45/1226 ,  H01L45/1286 ,  H01L45/1293 ,  H01L45/144 ,  H01L45/148 ,  H01L45/1683 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A reversible fuse structure in an integrated circuit is obtained through the implementation of a fuse cell having a short thin line of phase change materials in contact with via and line structures capable of passing current through the line of phase change material (fuse cell). The current is passed through the fuse cell in order to change the material from a less resistive material to a more resistive material through heating the phase change material in the crystalline state to the melting point then quickly quenching the material into the amorphous state. The reversible programming is achieved by passing a lower current through the fuse cell to convert the high resistivity amorphous material to a lower resistivity crystalline material. Appropriate sense-circuitry is integrated to read the information stored in the fuses, wherein said sense circuitry is used to enable or disable circuitry.

摘要翻译： 集成电路中的可逆熔丝结构通过实现具有短路相变材料的熔断电池获得，所述相变材料与能够使电流通过相变材料线（熔丝电池）的通孔和线结构相接触。 电流通过熔丝电池，以便通过将结晶状态的相变材料加热至熔点，从而将材料从较小电阻的材料转变为更电阻的材料，然后快速将材料淬火成非晶状态。 可逆编程通过使较低电流通过熔丝电池来实现，以将高电阻率无定形材料转换成较低电阻率的晶体材料。 集成适当的感测电路以读取存储在熔丝中的信息，其中所述感测电路用于启用或禁用电路。

公开(公告)号：US08445313B2

公开(公告)日：2013-05-21

申请号：US13546684

申请日：2012-07-11

申请人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Shih-Hung Chen ,  Eric A. Joseph ,  Chung Hon Lam ,  Michael F. Lofaro ,  Hsiang-Lan Lung ,  Alejandro G. Schrott ,  Min Yang

发明人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Shih-Hung Chen ,  Eric A. Joseph ,  Chung Hon Lam ,  Michael F. Lofaro ,  Hsiang-Lan Lung ,  Alejandro G. Schrott ,  Min Yang

IPC分类号： H01L21/00

CPC分类号： H01L45/06 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1683

摘要： A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and forming at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.

摘要翻译： 一种形成与相变材料对准的位线的方法，包括在下电极的一部分上形成牺牲材料的基座并且形成与所述牺牲材料相邻的至少一个电介质材料，其中所述至少一种电介质材料具有 上表面与牺牲材料的基座的上表面基本共面。 牺牲材料的基座被选择性地移除到至少一个电介质材料和下电极以提供到下电极的暴露表面的开口。 在下电极的暴露表面上形成相变材料，并且用导电填充材料填充开口。 还提供了自对准的回蚀工艺。

公开(公告)号：US20120202333A1

公开(公告)日：2012-08-09

申请号：US13020051

申请日：2011-02-03

申请人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Shih-Hung Chen ,  Eric A. Joseph ,  Chung Hon Lam ,  Michael F. Lofaro ,  Hsiang-Lan Lung ,  Alejandro G. Schrott ,  Min Yang

发明人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Shih-Hung Chen ,  Eric A. Joseph ,  Chung Hon Lam ,  Michael F. Lofaro ,  Hsiang-Lan Lung ,  Alejandro G. Schrott ,  Min Yang

IPC分类号： H01L21/02

CPC分类号： H01L45/06 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1683

摘要： A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and fowling at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.

摘要翻译： 一种形成与相变材料对准的位线的方法，其包括在下电极的一部分上形成牺牲材料的基座并且与邻近所述牺牲材料的至少一个电介质材料相连，其中所述至少一种电介质材料具有 上表面与牺牲材料的基座的上表面基本共面。 牺牲材料的基座被选择性地移除到至少一个电介质材料和下电极以提供到下电极的暴露表面的开口。 在下电极的暴露表面上形成相变材料，并且用导电填充材料填充开口。 还提供了自对准的回蚀工艺。

公开(公告)号：US08273598B2

公开(公告)日：2012-09-25

申请号：US13020051

申请日：2011-02-03

申请人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Shih-Hung Chen ,  Eric A. Joseph ,  Chung Hon Lam ,  Michael F. Lofaro ,  Hsiang-Lan Lung ,  Alejandro G. Schrott ,  Min Yang

发明人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Shih-Hung Chen ,  Eric A. Joseph ,  Chung Hon Lam ,  Michael F. Lofaro ,  Hsiang-Lan Lung ,  Alejandro G. Schrott ,  Min Yang

IPC分类号： H01L21/00

CPC分类号： H01L45/06 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1683

摘要： A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and forming at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.

摘要翻译： 一种形成与相变材料对准的位线的方法，包括在下电极的一部分上形成牺牲材料的基座并且形成与所述牺牲材料相邻的至少一个电介质材料，其中所述至少一种电介质材料具有 上表面与牺牲材料的基座的上表面基本共面。 牺牲材料的基座被选择性地移除到至少一个电介质材料和下电极以提供到下电极的暴露表面的开口。 在下电极的暴露表面上形成相变材料，并且用导电填充材料填充开口。 还提供了自对准的回蚀工艺。

公开(公告)号：US20120276688A1

公开(公告)日：2012-11-01

申请号：US13546684

申请日：2012-07-11

申请人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Shih-Hung Chen ,  Eric A. Joseph ,  Chung Hon Lam ,  Michael F. Lofaro ,  Hsiang-Lan Lung ,  Alejandro G. Schrott ,  Min Yang

发明人： Matthew J. Breitwisch ,  Chieh-Fang Chen ,  Shih-Hung Chen ,  Eric A. Joseph ,  Chung Hon Lam ,  Michael F. Lofaro ,  Hsiang-Lan Lung ,  Alejandro G. Schrott ,  Min Yang

IPC分类号： H01L21/06

CPC分类号： H01L45/06 ,  H01L45/144 ,  H01L45/1608 ,  H01L45/1683

摘要： A method of forming bit line aligned to a phase change material that includes forming a pedestal of a sacrificial material on a portion of a lower electrode and forming at least one dielectric material adjacent to the sacrificial material, wherein the at least one dielectric material has an upper surface substantially coplanar with an upper surface of the pedestal of the sacrificial material. The pedestal of the sacrificial material is removed selective to the at least one dielectric material and the lower electrode to provide an opening to an exposed surface of the lower electrode. A phase change material is formed on the exposed surface of the lower electrode, and the opening is filled with a conductive fill material. A self-aligned etch back process is also provided.

摘要翻译： 一种形成与相变材料对准的位线的方法，包括在下电极的一部分上形成牺牲材料的基座并且形成与所述牺牲材料相邻的至少一个电介质材料，其中所述至少一种电介质材料具有 上表面与牺牲材料的基座的上表面基本共面。 牺牲材料的基座被选择性地移除到至少一个电介质材料和下电极以提供到下电极的暴露表面的开口。 在下电极的暴露表面上形成相变材料，并且用导电填充材料填充开口。 还提供了自对准的回蚀工艺。

公开(公告)号：US08238149B2

公开(公告)日：2012-08-07

申请号：US12715802

申请日：2010-03-02

申请人： Yen-Hao Shih ,  Ming-Hsiu Lee ,  Chao-I Wu ,  Hsiang-Lan Lung ,  Chung Hon Lam ,  Roger Cheek ,  Matthew J. Breitwisch ,  Bipin Rajendran

发明人： Yen-Hao Shih ,  Ming-Hsiu Lee ,  Chao-I Wu ,  Hsiang-Lan Lung ,  Chung Hon Lam ,  Roger Cheek ,  Matthew J. Breitwisch ,  Bipin Rajendran

IPC分类号： G11C11/00

CPC分类号： G11C13/0004 ,  G11C13/004 ,  G11C29/70 ,  G11C2213/79

摘要： Phase change memory devices and methods for operating described herein are based on the discovery that, following an initial high current operation applied to a phase change memory cell to establish the high resistance reset state, the current-voltage (I-V) behavior of the memory cell under different bias voltages can be used to detect if the memory cell is a defect cell having poor data retention characteristics.

摘要翻译： 相位变化存储器件和这里描述的操作方法基于以下发现：在施加到相变存储器单元以建立高电阻复位状态的初始高电流操作之后，存储器单元的电流 - 电压（IV）行为 可以使用不同的偏置电压来检测存储器单元是否具有差的数据保留特性的缺陷单元。

公开(公告)号：US20120193599A1

公开(公告)日：2012-08-02

申请号：US13445194

申请日：2012-04-12

申请人： Hsiang-Lan Lung ,  Chung Hon Lam ,  Matthew J. Breitwisch

发明人： Hsiang-Lan Lung ,  Chung Hon Lam ,  Matthew J. Breitwisch

IPC分类号： H01L45/00

CPC分类号： H01L45/144 ,  H01L27/2436 ,  H01L27/2472 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/1625 ,  H01L45/1641 ,  H01L45/1675

摘要： An array of phase change memory cells is manufactured by forming a separation layer over an array of contacts, forming a patterning layer on the separation layer and forming an array of mask openings in the patterning layer using lithographic process. Etch masks are formed within the mask openings by a process that compensates for variation in the size of the mask openings that result from the lithographic process. The etch masks are used to etch through the separation layer to define an array of electrode openings exposing the underlying contacts. Electrode material is deposited within the electrode openings; and memory elements are formed over the bottom electrodes. Finally, bit lines are formed over the memory elements to complete the memory cells. In the resulting memory array, the critical dimension of the top surface of bottom electrode varies less than the width of the memory elements in the mask openings.

摘要翻译： 通过在触点阵列上形成分离层，在分离层上形成图形层并使用光刻工艺在图案形成层中形成掩模开口阵列来制造相变存储器单元的阵列。 通过补偿由平版印刷工艺产生的掩模开口的尺寸变化的过程，在掩模开口内形成蚀刻掩模。 蚀刻掩模用于蚀刻通过分离层以限定暴露下面的触点的电极开口的阵列。 电极材料沉积在电极开口内; 并且存储元件形成在底部电极上。 最后，在存储器元件上形成位线以完成存储器单元。 在所得到的存储器阵列中，底部电极的顶表面的临界尺寸小于掩模开口中存储元件的宽度。