公开(公告)号：US11164794B2

公开(公告)日：2021-11-02

申请号：US16531114

申请日：2019-08-04

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Wei Hong ,  Liu Jiang ,  Yanping Shen

IPC: H01L29/76 ,  H01L21/8238 ,  H01L27/088 ,  H01L27/092 ,  H01L29/08 ,  H01L29/417 ,  H01L29/423

Abstract: A semiconductor device is provided that includes an active region above a substrate, a first gate structure, a second gate structure, a first semiconductor structure, a second semiconductor structure and a semiconductor bridge. The first gate semiconductor and the second semiconductor structure are in the active region and between the first and the second gate structures. The first semiconductor structure is adjacent to the first gate structure and a second semiconductor structure is adjacent to the second gate structure. The semiconductor bridge is in the active region electrically coupling the first and the second semiconductor structures.

公开(公告)号：US20210320244A1

公开(公告)日：2021-10-14

申请号：US16846497

申请日：2020-04-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Sipeng Gu ,  Haiting Wang ,  Yanping Shen

IPC: H01L43/02 ,  H01L27/22 ,  H01L27/24 ,  H01L27/1159 ,  H01L43/08 ,  H01L43/12 ,  H01L45/00

Abstract: One illustrative device disclosed herein includes a memory cell positioned in a first opening in at least one layer of insulating material. The memory cell comprises a bottom electrode, a memory state material positioned above the bottom electrode and an internal sidewall spacer positioned within the first opening, wherein the internal sidewall spacer defines a spacer opening. The device also comprises a top electrode positioned within the spacer opening.

公开(公告)号：US11094827B2

公开(公告)日：2021-08-17

申请号：US16434136

申请日：2019-06-06

Applicant: GLOBALFOUNDRIES U.S. INC.

Inventor： Yanping Shen ,  Xiaoxiao Zhang ,  Shesh Mani Pandey ,  Hui Zang

IPC: H01L29/78 ,  H01L29/51 ,  H01L29/10 ,  H01L21/311 ,  H01L21/28 ,  H01L29/66 ,  H01L29/49

Abstract: The present disclosure generally relates to semiconductor device fabrication and integrated circuits. More particularly, the present disclosure relates to replacement metal gate processes and structures for multi-gate transistor devices having a short channel and a long channel component.