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公开(公告)号：US10401887B2
公开(公告)日：2019-09-03
申请号：US15745993
申请日：2015-07-22
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Tsung-Ching Huang , Chin-Hui Chen , Cheng Li
Abstract: A circuit includes a startup circuit to provide a charging signal to initiate startup of a reference circuit. The startup circuit includes a detector circuit having a detector current path control, a level shifter having a level shifter current path control, and a charger circuit having a charger current path control. Each of the detector current path control, the level shifter current path control, and the charger circuit current path control enable current flow in the startup circuit when the charger turn-on signal is in the on-state and disable the current flow in the startup circuit when the charger turn-on signal is in the off state.
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公开(公告)号：US20190190610A1
公开(公告)日：2019-06-20
申请号：US16275727
申请日：2019-02-14
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Cheng Li , Jim Huang , Ashkan Seyedi , Marco Fiorentino , Raymond G. Beausoleil
CPC classification number: H04B10/503 , G02F1/0102 , G02F1/0123 , G02F1/225 , G02F2001/212
Abstract: One example includes a bias-based Mach-Zehnder modulation (MZM) system. The system includes a Mach-Zehnder modulator to receive and split an optical input signal and to provide an intensity-modulated optical output signal based on a high-frequency data signal to modulate a relative phase of the split optical input signal to transmit data and based on a bias voltage to modulate the relative phase of the split optical input signal to tune the Mach-Zehnder modulator. The system also includes a bias feedback controller to compare a detection voltage associated with the intensity-modulated output signal with a reference voltage to measure an extinction ratio associated with an optical power of the intensity-modulated optical output signal and to adjust the bias voltage based on the comparison to substantially maximize the extinction ratio.
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公开(公告)号：US20190089466A1
公开(公告)日：2019-03-21
申请号：US16085364
申请日：2016-04-14
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Cheng Li , Kunzhi Yu , Marco Fiorentino , Raymond G. Beausoleil
IPC: H04B10/69 , H04B10/63 , H04B10/516 , H04L25/49
CPC classification number: H04B10/6931 , H04B10/5161 , H04B10/63 , H04B10/695 , H04L25/4917
Abstract: An example optical receiver may have an optical receiver front-end, four slicers, and a logic block. The optical receiver front-end may include a transimpedance amplifier to convert a photodiode output signal to a voltage signal. Three of the slicers may be data slicers, and one of the slicers may be an edge slicer. The slicers may each: shift the voltage signal based on an offset voltage set for the respective slicer, determine whether the shifted voltage signal is greater than a threshold value and generate a number of comparison signals based on the determining, and generate multiple digital signals by demuxing the comparison signals. The logic block may perform PAM-4 to binary decoding based on the data signals output by the data slicers and clock-and-data-recovery based on the digital signals output by the edge slicer.
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公开(公告)号：US10193634B2
公开(公告)日：2019-01-29
申请号：US15269542
申请日：2016-09-19
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Abstract: Examples disclosed herein relate to optical driver circuits. In some of the disclosed examples, an optical driver circuit includes a pre-driver circuit and a main driver circuit. The pre-driver circuit may include a pattern generator and at least one serializer to generate a main modulation signal and an inverted delayed modulation signal. The main driver circuit may include a level controller to control amplitudes of pre-emphasis on rising and falling edges of a modulation signal output and an equalization controller to transition the modulation signal output from the pre-emphasis amplitudes to main modulation amplitudes using the inverted delayed modulation signal.
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Patent Agency Ranking
公开(公告)号：US20180097139A1
公开(公告)日：2018-04-05
申请号：US15560649
申请日：2015-04-30
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
Inventor： Cheng Li , Zhihong Huang , Marco Fiorentino , Raymond G. Beausoleil
IPC: H01L31/107 , H01L25/04 , H01L27/146 , H04B10/69
CPC classification number: H01L31/107 , H01L25/041 , H01L27/14634 , H01L27/14636 , H04B10/00 , H04B10/6911
Abstract: An example device in accordance with an aspect of the present disclosure includes an avalanche photodetector to enable carrier multiplication for increased responsivity, and a receiver based on source-synchronous CMOS and including adaptive equalization. The photodetector and receiver are monolithically integrated on a single chip.
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公开(公告)号：US10530488B2
公开(公告)日：2020-01-07
申请号：US16231159
申请日：2018-12-21
Applicant: Hewlett Packard Enterprise Development LP
Abstract: Examples disclosed herein relate to optical driver circuits. In some of the disclosed examples, an optical driver circuit includes a pre-driver circuit and a main driver circuit. The pre-driver circuit may include a pattern generator and at least one serializer to generate a main modulation signal and an inverted delayed modulation signal. The main driver circuit may include a level controller to control amplitudes of pre-emphasis on rising and falling edges of a modulation signal output and an equalization controller to transition the modulation signal output from the pre-emphasis amplitudes to main modulation amplitudes using the inverted delayed modulation signal.
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公开(公告)号：US20190131942A1
公开(公告)日：2019-05-02
申请号：US15768864
申请日：2015-10-23
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Cheng Li , Zhihong Huang
Abstract: One embodiment describes a transimpedance amplifier (TIA) system. The system includes an inverter TIA stage interconnecting an input node and an output node and configured to invert an input signal at the input node to provide a first inverted signal component at the output node. The system also includes a noise-canceling inverter stage arranged in parallel with the inverter stage and being configured to invert the input signal to provide a second inverted signal component and to invert noise from the input node. Thus, the first and second inverted signal components constructively combine at the output node and the noise is substantially mitigated at the output node.
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公开(公告)号：US20180083711A1
公开(公告)日：2018-03-22
申请号：US15269542
申请日：2016-09-19
Applicant: HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP
IPC: H04B10/564 , H04L27/01 , H04B10/54
CPC classification number: H04B10/564 , H04B10/504 , H04B10/541 , H04B10/58 , H04B10/801 , H04L25/028 , H04L25/03885 , H04L27/01
Abstract: Examples disclosed herein relate to optical driver circuits. In some of the disclosed examples, an optical driver circuit includes a pre-driver circuit and a main driver circuit. The pre-driver circuit may include a pattern generator and at least one serializer to generate a main modulation signal and an inverted delayed modulation signal. The main driver circuit may include a level controller to control amplitudes of pre-emphasis on rising and falling edges of a modulation signal output and an equalization controller to transition the modulation signal output from the pre-emphasis amplitudes to main modulation amplitudes using the inverted delayed modulation signal.
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公开(公告)号：US20180076836A1
公开(公告)日：2018-03-15
申请号：US15266574
申请日：2016-09-15
Applicant: Hewlett Packard Enterprise Development LP
Inventor： Kehan Zhu , Cheng Li , Zhubiao Zhu
IPC: H04B1/04 , H03K19/0175 , H03K17/687 , H04L27/04
CPC classification number: H04B1/04 , H01S5/0427 , H03K19/017509 , H04B10/524 , H04B10/541 , H04B10/801 , H04L27/04
Abstract: An example device in accordance with an aspect of the present disclosure includes at least one segment driver circuit having a first circuit and a second circuit, to receive input signals and provide output signals. A given segment driver circuit is to protect reliability and enable reconfigurability by selectively resetting coupling capacitors, and selectively cutting off the input signals from their respective segment driver circuit.
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