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    Electrically Erasable Programmable Read-Only Memory (EEPROM) Cell and Methods for Forming and Reading the Same
    21.
    发明申请
    Electrically Erasable Programmable Read-Only Memory (EEPROM) Cell and Methods for Forming and Reading the Same 有权
    电可擦除可编程只读存储器（EEPROM）单元及其形成和读取方法

    公开(公告)号：US20110038210A1

    公开(公告)日：2011-02-17

    申请号：US12912517

    申请日：2010-10-26

    申请人： Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Jung-Ho Moon ,  Soung-Youb Ha

    发明人： Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Jung-Ho Moon ,  Soung-Youb Ha

    IPC分类号： G11C16/26 ,  G11C16/04 ,  G11C16/30

    CPC分类号： G11C16/0433 ,  G11C16/26 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11529

    摘要： In a method of reading data in an EEPROM cell, a bit line voltage for reading is applied to the EEPROM cell including a memory transistor and a selection transistor. A first voltage is applied to a sense line of the memory transistor. A second voltage greater than the first voltage is applied to a word line of the selection transistor. A current passing through the EEPROM cell is compared with a predetermined reference current to read the data stored in the EEPROM cell. An on-cell current of the EEPROM cell may be increased in an erased state and the data in the cell may be readily discriminated.

    摘要翻译： 在EEPROM单元中读取数据的方法中，用于读取的位线电压被施加到包括存储晶体管和选择晶体管的EEPROM单元。 第一电压被施加到存储晶体管的感测线。 大于第一电压的第二电压被施加到选择晶体管的字线。 将通过EEPROM单元的电流与预定的参考电流进行比较，以读取存储在EEPROM单元中的数据。 可以在擦除状态下增加EEPROM单元的通电池电流，并且可以容易地区分单元中的数据。

    Mask ROM and method of fabricating the same
    22.
    发明授权
    Mask ROM and method of fabricating the same 有权
    掩模ROM及其制造方法

    公开(公告)号：US07638387B2

    公开(公告)日：2009-12-29

    申请号：US11823381

    申请日：2007-06-27

    申请人： Yong-Kyu Lee ,  Hee-Seog Jeon ,  Jeong-Uk Han ,  Young-Ho Kim ,  Myung-Jo Chun

    发明人： Yong-Kyu Lee ,  Hee-Seog Jeon ,  Jeong-Uk Han ,  Young-Ho Kim ,  Myung-Jo Chun

    IPC分类号： H01L21/8234

    CPC分类号： H01L27/1021

    摘要： A mask read-only memory (ROM) includes a dielectric layer formed on a substrate and a plurality of first conductive lines formed on the dielectric layer. A plurality of diodes are formed in the first conductive lines, and a plurality of final vias are formed for a first set of the diodes each representing a first type of memory cell, with no final via being formed for a second set of diodes each representing a second type of memory cell. Each of a plurality of second conductive lines is formed over a column of the diodes.

    摘要翻译： 掩模只读存储器（ROM）包括形成在基板上的电介质层和形成在电介质层上的多个第一导电线。 在第一导线中形成多个二极管，并且为第一组二极管形成多个最终通孔，每个二极管表示第一类型的存储单元，没有形成用于第二组二极管的最终通孔，每个二极管表示 第二种类型的存储单元。 多个第二导电线中的每一个形成在二极管的列上。

    Mask ROM device, semiconductor device including the mask ROM device, and methods of fabricating mask ROM device and semiconductor device
    24.
    发明授权
    Mask ROM device, semiconductor device including the mask ROM device, and methods of fabricating mask ROM device and semiconductor device 失效
    掩模ROM器件，包括掩模ROM器件的半导体器件，以及制造掩模ROM器件和半导体器件的方法

    公开(公告)号：US08053342B2

    公开(公告)日：2011-11-08

    申请号：US12836066

    申请日：2010-07-14

    申请人： Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Young-Ho Kim ,  Myung-Jo Chun ,  Jung-Ho Moon

    发明人： Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Young-Ho Kim ,  Myung-Jo Chun ,  Jung-Ho Moon

    IPC分类号： H01L21/8238

    CPC分类号： H01L27/105 ,  H01L21/26586 ,  H01L21/823807 ,  H01L21/823814 ,  H01L27/1052 ,  H01L27/11266 ,  H01L27/11293

    摘要： A mask read-only memory (ROM) device, which can stably output data, includes an on-cell and an off-cell. The on-cell includes an on-cell gate structure on a substrate and an on-cell junction structure within the substrate. The off-cell includes an off-cell gate structure on the substrate and an off-cell junction structure within the substrate. The on-cell gate structure includes an on-cell gate insulating film, an on-cell gate electrode and an on-cell gate spacer. The on-cell junction structure includes first and second on-cell ion implantation regions of a first polarity and third and fourth on-cell ion implantation regions of a second polarity. The off-cell gate structure includes an off-cell gate insulating film, an off-cell gate electrode and an off-cell gate spacer. The off-cell junction structure includes first and second off-cell ion implantation regions of the first polarity and a third off-cell ion implantation region of the second polarity.

    摘要翻译： 可以稳定地输出数据的掩模只读存储器（ROM）装置包括接通电池和截止电池。 开放单元包括衬底上的孔上栅极结构和衬底内的电池单元结结构。 离子电池包括在衬底上的离子电池栅极结构和衬底内的细胞外结合结构。 单体栅极结构包括单元间栅极绝缘膜，单晶体栅极电极和单元间栅极间隔物。 该单电池结结构包括具有第一极性的第一和第二开孔离子注入区和第二极性的第三和第四接通电离子注入区。 离群栅极结构包括离子栅极绝缘膜，离子阱栅极电极和非电池栅极间隔物。 离电池结结构包括具有第一极性的第一和第二离子外离子注入区域和第二极性的第三离子间离子注入区域。

    Non-volatile memory device, method of manufacturing the same and method of operating the same
    26.
    发明授权
    Non-volatile memory device, method of manufacturing the same and method of operating the same 失效
    非易失性存储器件，其制造方法及其操作方法

    公开(公告)号：US07696561B2

    公开(公告)日：2010-04-13

    申请号：US11870762

    申请日：2007-10-11

    申请人： Hyun-Khe Yoo ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Sung-Gon Choi ,  Bo-Young Seo ,  Chang-Min Jeon ,  Ji-Do Ryu

    发明人： Hyun-Khe Yoo ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Sung-Gon Choi ,  Bo-Young Seo ,  Chang-Min Jeon ,  Ji-Do Ryu

    IPC分类号： H01L21/336

    CPC分类号： H01L27/115 ,  H01L27/11521 ,  H01L27/11524

    摘要： A non-volatile memory device includes a first sensing line, a first word line, a depletion channel region, and impurity regions. The first sensing line and the first word line are formed adjacent to each other in parallel on a substrate. The first sensing line and the first word line have a tunnel oxide layer, a first conductive pattern, a dielectric layer pattern and a second conductive pattern sequentially stacked on the substrate. The depletion channel region is formed at an upper portion of the substrate under the first sensing line. The impurity regions are formed at upper portions of the substrate exposed by the first sensing line and the first word line.

    摘要翻译： 非易失性存储器件包括第一感测线，第一字线，耗尽沟道区和杂质区。 第一感测线和第一字线在基板上彼此平行地相邻地形成。 第一感测线和第一字线具有依次层叠在衬底上的隧道氧化物层，第一导电图案，电介质层图案和第二导电图案。 耗尽沟道区形成在第一感测线下方的衬底的上部。 在由第一感测线和第一字线露出的衬底的上部形成杂质区。

    Non-volatile memory device
    27.
    发明授权
    Non-volatile memory device 有权
    非易失性存储器件

    公开(公告)号：US07512003B2

    公开(公告)日：2009-03-31

    申请号：US11789003

    申请日：2007-04-23

    申请人： Hyun-Khe Yoo ,  Ji-Do Ryu ,  Bo-Young Seo ,  Chang-Min Jeon ,  Hee-Seog Jeon ,  Sung-Gon Choi ,  Jeong-Uk Han

    发明人： Hyun-Khe Yoo ,  Ji-Do Ryu ,  Bo-Young Seo ,  Chang-Min Jeon ,  Hee-Seog Jeon ,  Sung-Gon Choi ,  Jeong-Uk Han

    IPC分类号： G11C11/34

    CPC分类号： G11C16/0433 ,  G11C7/18 ,  G11C16/24 ,  G11C2207/002

    摘要： A non-volatile memory device includes a memory cell block, a first switching block, and a second switching block. A plurality of memory cells are arranged in the memory cell block and each of the memory cells includes a memory transistor having a floating gate and a control gate and is connected to a local bit line and includes a selection transistor connected to the memory transistor in series that is connected to a source line. The first switching block selectively connects a global bit line to the local bit line and the second switching block controls the memory cells in the memory cell block in units of a predetermined number of bits. The first switching block includes at least two switching devices connected in parallel between the global bit line and the local bit line.

    摘要翻译： 非易失性存储器件包括存储器单元块，第一切换块和第二切换块。 多个存储单元布置在存储单元块中，并且每个存储单元包括具有浮置栅极和控制栅极的存储晶体管，并连接到局部位线，并且包括串联连接到存储晶体管的选择晶体管 它连接到源线。 第一切换块选择性地将全局位线连接到本地位线，而第二切换块以预定位数为单位来控制存储单元块中的存储单元。 第一切换块包括在全局位线和局部位线之间并联连接的至少两个开关器件。

    Electrically erasable programmable read-only memory (EEPROM) cell and methods for forming and reading the same
    29.
    发明授权
    Electrically erasable programmable read-only memory (EEPROM) cell and methods for forming and reading the same 有权
    电可擦除可编程只读存储器（EEPROM）单元及其形成和读取方法

    公开(公告)号：US07944753B2

    公开(公告)日：2011-05-17

    申请号：US12912517

    申请日：2010-10-26

    申请人： Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Jung-Ho Moon ,  Soung-Youb Ha

    发明人： Yong-Kyu Lee ,  Jeong-Uk Han ,  Hee-Seog Jeon ,  Jung-Ho Moon ,  Soung-Youb Ha

    IPC分类号： G11C16/04

    CPC分类号： G11C16/0433 ,  G11C16/26 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11529

    摘要： In a method of reading data in an EEPROM cell, a bit line voltage for reading is applied to the EEPROM cell including a memory transistor and a selection transistor. A first voltage is applied to a sense line of the memory transistor. A second voltage greater than the first voltage is applied to a word line of the selection transistor. A current passing through the EEPROM cell is compared with a predetermined reference current to read the data stored in the EEPROM cell. An on-cell current of the EEPROM cell may be increased in an erased state and the data in the cell may be readily discriminated.

    摘要翻译： 在EEPROM单元中读取数据的方法中，用于读取的位线电压被施加到包括存储晶体管和选择晶体管的EEPROM单元。 第一电压被施加到存储晶体管的感测线。 大于第一电压的第二电压被施加到选择晶体管的字线。 将通过EEPROM单元的电流与预定的参考电流进行比较，以读取存储在EEPROM单元中的数据。 可以在擦除状态下增加EEPROM单元的通电池电流，并且可以容易地区分单元中的数据。