公开(公告)号：US09524766B2

公开(公告)日：2016-12-20

申请号：US14714796

申请日：2015-05-18

Applicant: Infineon Technologies AG

Inventor： David Mueller ,  Wolf Allers ,  Mihail Jefremow

IPC: G11C11/00 ,  G11C11/16 ,  G11C7/02 ,  G11C7/12 ,  G11C29/02 ,  G11C29/50

CPC classification number: G11C11/1673 ,  G11C7/02 ,  G11C7/12 ,  G11C11/16 ,  G11C11/1659 ,  G11C29/021 ,  G11C29/028 ,  G11C2029/5006

Abstract: The invention relates to methods and systems for reading a memory cell and in particular, an STT MRAM. In one example, a system for reading a memory cell includes a sense path and an inverse path. A reference current is provided through the sense path and is sampled via a first sampling element in the sense path, and a cell current from the memory cell is provided through the inverse sense path and is sampled via a second sampling element in the inverse sense path. Subsequently, the memory cell is disconnected from the inverse sense path, the cell current is provided through the sense path, the reference source is disconnected from the sense path, and the reference current is provided through the inverse sense path. The output levels are then determined by the cell and reference currents working against the sampled reference and sampled cell currents.

公开(公告)号：US09032140B2

公开(公告)日：2015-05-12

申请号：US13751883

申请日：2013-01-28

Applicant: Infineon Technologies AG

Inventor： Wolf Allers ,  Jan Otterstedt ,  Mihail Jefremow ,  Edvin Paparisto ,  Leonardo Castro

IPC: G11C16/10 ,  G06F12/02 ,  G11C16/06 ,  G11C16/24 ,  G11C16/34

CPC classification number: G06F12/0246 ,  G11C16/06 ,  G11C16/10 ,  G11C16/24 ,  G11C16/3486

Abstract: The disclosure relates to an electronic memory system, and more specifically, to a system for adaptive bit rate programming of a memory device, and a method for adaptive bit rate programming of a memory device. According to an embodiment, a system for adaptive bit rate programming of a memory device including a plurality of memory cells is provided, wherein the memory cells are configured to be electrically programmable by application of a current supplied by a current source, the system including selection devices for selecting memory cells for programming based on availability of current from the current source.

Abstract translation: 本公开涉及电子存储器系统，更具体地，涉及用于存储器件的自适应比特率编程的系统，以及用于存储器件的自适应比特率编程的方法。 根据实施例，提供了一种用于包括多个存储器单元的存储器件的自适应位速率编程的系统，其中存储器单元被配置为可通过施加由电流源提供的电流进行电可编程，所述系统包括选择 用于基于来自当前源的电流的可用性来选择用于编程的存储器单元的设备。