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26 条记录 (耗时 0.035 秒)

    Semiconductor material, field effect transistor and manufacturing method thereof
    24.
    发明授权
    Semiconductor material, field effect transistor and manufacturing method thereof 失效
    半导体材料，场效应晶体管及其制造方法

    公开(公告)号：US07109072B2

    公开(公告)日：2006-09-19

    申请号：US11072414

    申请日：2005-03-07

    申请人： Shinichi Saito ,  Tadashi Arai ,  Seong-Kee Park ,  Toshiyuki Mine

    发明人： Shinichi Saito ,  Tadashi Arai ,  Seong-Kee Park ,  Toshiyuki Mine

    IPC分类号： H01L21/00 ,  H01L21/84

    CPC分类号： H01L29/42392 ,  B82Y10/00 ,  H01L27/12 ,  H01L27/1292 ,  H01L29/0673 ,  H01L29/66772 ,  H01L29/78603 ,  H01L29/78696 ,  Y10S977/723 ,  Y10S977/762 ,  Y10S977/932 ,  Y10S977/937

    摘要： The silicon wires formed around metal particles by crystal growth have the problem of metal pollution. For its solution, in the present invention, a silicon bridge is formed through standard silicon processes such as the lithography and the wet etching using hydrofluoric acid performed to an SOI substrate. Thereafter, a thermal oxide film is desirably formed at a high temperature to form a high-quality gate insulating film. It is also desirable to form a coaxial gate electrode. Then, after burying the bridge sections of the silicon bridge in a resist film, the silicon on the bridge girders is removed, and thereafter, the silicon wires buried in the resist film are collected. In this manner, the silicon wires can be collected without dispersing into the hydrofluoric acid solution. Then, a transistor using the silicon wires as a channel is formed.

    摘要翻译： 通过晶体生长在金属颗粒周围形成的硅线具有金属污染的问题。 对于其解决方案，在本发明中，通过使用对SOI衬底执行的氢氟酸的光刻和湿蚀刻的标准硅工艺形成硅桥。 此后，期望在高温下形成热氧化膜以形成高质量的栅极绝缘膜。 还希望形成同轴栅电极。 然后，在将硅桥的桥接部分埋入抗蚀剂膜中之后，除去桥梁上的硅，然后收集埋在抗蚀剂膜中的硅线。 以这种方式，可以收集硅线而不会分散到氢氟酸溶液中。 然后，形成使用硅线作为沟道的晶体管。

    Thin film semiconductor device, polycrystalline semiconductor thin film production process and production apparatus
    26.
    发明授权
    Thin film semiconductor device, polycrystalline semiconductor thin film production process and production apparatus 有权
    薄膜半导体器件，多晶半导体薄膜生产工艺及生产设备

    公开(公告)号：US06756614B2

    公开(公告)日：2004-06-29

    申请号：US09791853

    申请日：2001-02-26

    申请人： Mutsuko Hatano ,  Shinya Yamaguchi ,  Yoshinobu Kimura ,  Seong-Kee Park

    发明人： Mutsuko Hatano ,  Shinya Yamaguchi ,  Yoshinobu Kimura ,  Seong-Kee Park

    IPC分类号： H01L31072

    CPC分类号： H01L29/04 ,  B23K26/0622 ,  H01L21/02686 ,  H01L21/02691 ,  H01L27/1281 ,  H01L27/1285 ,  H01L27/1296 ,  H01L29/78675

    摘要： In an MIS field effect transistor having a gate electrode formed on a first semiconductor layer which is a polycrystalline silicon film on an insulating substrate through a gate insulating film, a channel region formed in the semiconductor layer and a source region and a drain region arranged on both sides of the channel region, a thin film semiconductor device has a main orientation of at least the channel region of {110} with respect to the surface of the gate insulating film. Further, a polycrystalline semiconductor film having a main orientation of the surface almost perpendicular to a direction for connecting the source and drain regions of {100} is preferably used in the channel of a semiconductor device. According to the present invention, a semiconductor device having a high-quality polycrystalline semiconductor film whose grain boundary, grain size and crystal orientation can be controlled and whose film roughness and crystal defects formed by crystallization have been reduced can be obtained on the insulating substrate.

    摘要翻译： 在具有通过栅极绝缘膜在绝缘基板上形成在多晶硅膜的第一半导体层上的栅电极的MIS场效应晶体管中，形成在半导体层中的沟道区和布置在该半导体层上的源极区和漏极区 通道区域的两侧，薄膜半导体器件相对于栅极绝缘膜的表面至少具有{110}的沟道区域的主取向。 此外，优选在半导体器件的沟道中使用具有与用于连接{100}的源极和漏极区域的方向几乎垂直的表面的主取向的多晶半导体膜。 根据本发明，可以在绝缘基板上获得具有可以控制其晶界，晶粒尺寸和晶体取向并且通过结晶形成的膜粗糙度和晶体缺陷已经降低的高品质多晶半导体膜的半导体器件。