Data processing circuit and method for transmitting data

    公开(公告)号:US20050116740A1

    公开(公告)日:2005-06-02

    申请号:US11004658

    申请日:2004-12-03

    摘要: Data processing circuit including a single rail bus having a single rail line, a dual rail bus having a first dual rail line for data bits and a second dual rail line for inverted data bits, and a converter for converting signals on the single rail bus into signals on the dual rail bus and vice versa. The converter has a read driver for transferring signals on the first dual rail line to the single rail bus when the read driver is active, a write driver for transferring the signals on the single rail bus to the first dual rail line when the write driver is active, a producer for producing the signals on the second dual rail line from the signals on the first dual rail line when the write driver is active, and a controller for controlling the drivers so that at most only one driver is active.

    Data carrier with regulation of the power consumption
    22.
    发明授权
    Data carrier with regulation of the power consumption 有权
    数据载体调节功耗

    公开(公告)号:US06581842B2

    公开(公告)日:2003-06-24

    申请号:US09771914

    申请日:2001-01-29

    IPC分类号: G06K1906

    CPC分类号: G06K19/0701 G06K19/0723

    摘要: A data carrier, in particular a smart card, is described and has at least one transmitting/receiving antenna and also a rectifier circuit connected downstream thereof and serving for providing a supply voltage for at least one circuit unit. A voltage regulating circuit is connected in parallel with the supply voltage terminals of the circuit unit. The voltage regulating circuit has an output at which a signal proportional to a regulating signal of the voltage regulating circuit can be tapped off. This output is connected to the control input of a controllable clock signal generator, which provides the clock signal for the at least one circuit unit.

    摘要翻译: 描述数据载体,特别是智能卡,并且具有至少一个发送/接收天线以及连接在其下游的用于为至少一个电路单元提供电源电压的整流电路。 电压调节电路与电路单元的电源电压端并联连接。 电压调节电路具有与电压调节电路的调节信号成比例的信号可被分接的输出。 该输出连接到可控时钟信号发生器的控制输入端,该可控时钟信号发生器为至少一个电路单元提供时钟信号。

    Semiconductor memory with non-volatile two-transistor memory cells
    23.
    发明授权
    Semiconductor memory with non-volatile two-transistor memory cells 有权
    具有非易失性双晶体管存储单元的半导体存储器

    公开(公告)号:US06266274B1

    公开(公告)日:2001-07-24

    申请号:US09483734

    申请日:2000-01-14

    IPC分类号: G11C1604

    CPC分类号: G11C16/0433

    摘要: The invention relates to a semiconductor memory having a non-volatile two-transistor memory cell which has an N-channel selection transistor and an N-channel memory transistor. The drive circuitry for the cell includes a P-channel transfer transistor. A transfer channel is connected to a row line leading to the memory cell. This enables the voltages required for programming to be obtained with relatively little technological complexity.

    摘要翻译: 本发明涉及具有非易失性双晶体管存储单元的半导体存储器,其具有N沟道选择晶体管和N沟道存储晶体管。 该单元的驱动电路包括一个P沟道转移晶体管。 传送通道连接到通向存储单元的行线。 这使得能够以相对较小的技术复杂度获得编程所需的电压。

    Read-only memory having specially output circuits and word line
connected to a group of memory cells
    24.
    发明授权
    Read-only memory having specially output circuits and word line connected to a group of memory cells 失效
    只读存储器具有专门的输出电路和字线连接到一组存储单元

    公开(公告)号:US6166952A

    公开(公告)日:2000-12-26

    申请号:US93573

    申请日:1998-06-08

    申请人: Holger Sedlak

    发明人: Holger Sedlak

    CPC分类号: G11C16/0416 G11C17/12

    摘要: A read-only memory having a multiplicity of memory cells whose contents can be read out with appropriate addressing by word, bit and source lines. The read-only memory is distinguished by the fact that the memory cells which can be addressed via an individual word line are divided into a multiplicity of groups, to each of which a separate common source line is assigned. Accordingly, a group-by-group read-out of the memory cells which can be addressed via an individual word line is carried out.

    摘要翻译: 具有多个存储器单元的只读存储器,其内容可以通过字,位和源极线的适当寻址读出。 通过以下事实来区分只读存储器:可以通过单个字线寻址的存储器单元被分成多个组,其中分配了单独的公共源线。 因此,执行可以通过单个字线寻址的存储器单元的逐个组读出。

    Method for modular multiplication
    27.
    发明授权
    Method for modular multiplication 有权
    模数乘法的方法

    公开(公告)号:US07831650B2

    公开(公告)日:2010-11-09

    申请号:US11440725

    申请日:2006-05-25

    IPC分类号: G06F7/38

    CPC分类号: G06F7/722

    摘要: In a method for modular multiplication using a multiplication look-ahead process for computing a multiplication shift value and a reduction look-ahead process for computing a reduction shift value, a modulus is first transformed into a transformed modulus that is greater than said modulus. The transformation is carried out such that a predetermined fraction of the transformed modulus has a higher-order digit with a first predetermined value that is followed by at least one low-order digit having a second predetermined value. During the iterative working off of the modular multiplication using the multiplication look-ahead process and the reduction look-ahead process, the transformed modulus is utilized so as to obtain at the end of the iteration a transformed result for the modular multiplication. Finally, the transformed result is re-transformed by modular reduction using the original modulus. By means of the transformation according to the invention, iterative working off of the modular multiplication is simplified so that the modular multiplication can be performed faster.

    摘要翻译: 在使用用于计算乘法偏移值的乘法预先处理和用于计算减少移位值的减少预先处理的乘法的方法中,首先将模量转换为大于所述模数的变换模数。 进行变换,使得变换模数的预定分数具有具有第一预定值的高阶数字,其后是具有第二预定值的至少一个低位数字。 在使用乘法预先处理和缩小预先处理进行的乘法迭代处理期间,利用变换的模数,以便在迭代结束时获得用于模数乘法的变换结果。 最后,通过使用原始模数的模块化减少来重新转换变换结果。 通过根据本发明的变换,简化了乘法的迭代处理,使得可以更快地执行模乘。

    Flip-flop device and method for storing and outputting a data value
    28.
    发明授权
    Flip-flop device and method for storing and outputting a data value 有权
    触发器装置和用于存储和输出数据值的方法

    公开(公告)号:US07782108B2

    公开(公告)日:2010-08-24

    申请号:US11563062

    申请日:2006-11-24

    申请人: Holger Sedlak

    发明人: Holger Sedlak

    IPC分类号: H03K3/356

    CPC分类号: H03K3/356173

    摘要: A flip-flop device for storing and outputting a data value includes a controllable memory element configured to be open as a function of a control pulse, a feedback means for comparing a data value present at the memory element and the data value output by the memory element, and for outputting a comparison signal, and a control pulse generator for generating the control pulse as a function of the comparison signal, so that the control pulse generator is put in an activated state when the comparison signal is high, so as to then, in the activated state, open the memory element in response to a clock event. The memory element will then be closed again when the comparison signal indicates that the same values are present at the output and at the input of the memory element.

    摘要翻译: 用于存储和输出数据值的触发器装置包括被配置为根据控制脉冲打开的可控存储器元件,用于比较存储元件存在的数据值和由存储器输出的数据值的反馈装置 元件,并输出比较信号;以及控制脉冲发生器,用于根据比较信号产生控制脉冲,使得当比较信号为高时,控制脉冲发生器处于激活状态,从而 在激活状态下,响应时钟事件打开存储器元件。 当比较信号表示在输出端和存储器元件的输入处存在相同的值时,存储器元件将再次被关闭。

    Heat Pump Comprising a Cooling Mode
    29.
    发明申请
    Heat Pump Comprising a Cooling Mode 有权
    包括冷却模式的热泵

    公开(公告)号:US20100064697A1

    公开(公告)日:2010-03-18

    申请号:US12517019

    申请日:2007-11-23

    CPC分类号: F25B19/00 F25B30/06 Y02B30/52

    摘要: A heat pump having a cooling mode includes a cooling evaporator coupled to an advance flow and a backflow. The cooling evaporator is brought to a pressure such that a vaporization temperature of the working liquid in the backflow is below a temperature of an object to be cooled to which the backflow may be thermally coupled. In this manner, an area having vapor at high pressure is generated. This vapor is fed into a dynamic-type compressor which outputs the vapor at a low pressure and provides electrical energy in the process. The vapor at low pressure is fed to a cooling liquefier which provides vapor liquefaction at a low temperature, this temperature being lower than the temperature of the object to be cooled. The working liquid removed from the cooling evaporator due to the vaporization is refilled by a filling pump. The heat pump having a cooling mode also results when a specific heat pump is operated in the reverse direction, and provides cooling without any net use of electrical energy. Instead, the cooling even generates electrical energy.

    摘要翻译: 具有冷却模式的热泵包括耦合到提前流量和回流的冷却蒸发器。 使冷却蒸发器达到压力,使得回流中的工作液体的蒸发温度低于回流可以热耦合的待冷却物体的温度。 以这种方式产生具有高压蒸汽的区域。 该蒸气被送入动态压缩机,该压缩机在低压下输出蒸汽并在该过程中提供电能。 低压蒸气被送入冷却液化器,在低温下提供汽化液化,该温度低于被冷却物体的温度。 由于蒸发而从冷却蒸发器中除去的工作液体被填充泵重新填充。 具有冷却模式的热泵也可以在特定的热泵以相反的方向工作时产生,并且在没有净能量的情况下提供冷却。 相反,冷却甚至产生电能。

    Microprocessor configuration and method for operating a microprocessor configuration
    30.
    发明授权
    Microprocessor configuration and method for operating a microprocessor configuration 有权
    用于操作微处理器配置的微处理器配置和方法

    公开(公告)号:US07526655B2

    公开(公告)日:2009-04-28

    申请号:US10197792

    申请日:2002-07-18

    IPC分类号: G06F12/14

    CPC分类号: G06F21/75 G06F12/1408

    摘要: In a microprocessor configuration, data is temporarily stored in a cache memory or a register bank. A respectively assigned cryptographic unit ensures that the data is encrypted or decrypted when the cache memory or the register bank is accessed. The keyword which is used here is changed if the cache memory or the register no longer contains any valid data to be read out. As a result, an increased protection is obtained against unauthorized monitoring of data and program sequences.

    摘要翻译: 在微处理器配置中,数据被临时存储在高速缓冲存储器或寄存器组中。 分配的加密单元确保当高速缓冲存储器或寄存器组被访问时数据被加密或解密。 如果高速缓冲存储器或寄存器不再包含要读出的有效数据,则此处使用的关键字将被更改。 结果,获得了对数据和程序序列的未经授权监视的增加的保护。