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21.发明授权Digital printing plate and system with electrostatically latched deformable membranes 有权数字印版和带有静电锁定可变形膜的系统公开(公告)号：US08291823B2
公开(公告)日：2012-10-23
申请号：US12957113
申请日：2010-11-30
CPC分类号： B41M1/10 , B41M1/04 , B41M1/06 , H05K3/207 , H05K2201/091 , H05K2203/105
摘要： A printing surface includes a substrate having latching electrodes on a first surface, a spacer layer on the first surface of the substrate, the spacer layer patterned to form wells such that the latching electrodes reside in the wells, a deformable membrane, the membrane having conductive regions, on the spacer layer to enclose the wells, each enclosed well and its associated region of the membrane forming a pixel membrane, and actuation circuitry to actuate the electrodes to cause selected ones of the pixel membranes to remain in a deflected state when the pixel membranes receive an impulse to return to an undeflected state.
摘要翻译： 打印表面包括在第一表面上具有锁定电极的基板，在基板的第一表面上的间隔层，图案化的间隔层以形成孔，使得锁定电极驻留在孔中，可变形的膜，该膜具有导电 区域，在间隔层上包围孔，每个封闭的井及其膜的相关区域形成像素膜，以及致动电路，用于致动电极，以使像素膜中选定的像素膜保持在偏转状态，当像素 膜受到冲击以返回到未偏转的状态。
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22.发明授权Digital printing plate and system with electrostatically latched deformable membranes 有权数字印版和带有静电锁定可变形膜的系统公开(公告)号：US07886662B2
公开(公告)日：2011-02-15
申请号：US11613159
申请日：2006-12-19
CPC分类号： B41M1/10 , B41M1/04 , B41M1/06 , H05K3/207 , H05K2201/091 , H05K2203/105
摘要： A printing surface includes a substrate having latching electrodes on a first surface, a spacer layer on the first surface of the substrate, the spacer layer patterned to form wells such that the latching electrodes reside in the wells, a deformable membrane, the membrane having conductive regions, on the spacer layer to enclose the wells, each enclosed well and its associated region of the membrane forming a pixel membrane, and actuation circuitry to actuate the electrodes to cause selected ones of the pixel membranes to remain in a deflected state when the pixel membranes receive an impulse to return to an undeflected state.
摘要翻译： 打印表面包括在第一表面上具有锁定电极的基板，在基板的第一表面上的间隔层，图案化的间隔层以形成孔，使得锁定电极驻留在孔中，可变形的膜，该膜具有导电 区域，在间隔层上包围孔，每个封闭的井及其膜的相关区域形成像素膜，以及致动电路，用于致动电极，以使像素膜中选定的像素膜保持在偏转状态，当像素 膜受到冲击以返回到未偏转的状态。
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23.发明申请Systems and Methods for biasing high fill-factor sensor arrays and the like 有权用于偏置高填充因子传感器阵列的系统和方法等公开(公告)号：US20090160007A1
公开(公告)日：2009-06-25
申请号：US12392943
申请日：2009-02-25
申请人： JengPing Lu , James B. Boyce , Kathleen Dore Boyce
发明人： JengPing Lu , James B. Boyce , Kathleen Dore Boyce
IPC分类号： H01L31/105 , H01L27/144
CPC分类号： H01L27/1446 , H01L31/105
摘要： A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in this invention allows to achieve mass production of photosensors without the use of wire bonding.
摘要翻译： 形成高填充因子光电传感器阵列，其包括P层，I层，与I层相邻并且各自耦合到N层的一个或多个半导体结构，形成在P的顶部上的导电电极 以及与N层相邻并且与电压偏置源电连接的附加半导体结构。 施加到附加半导体结构的偏置电压对附加的半导体结构进行充电，从而在N层和P层之间产生隧穿效应，其中电子离开N层并到达P层和导电层。 电子然后在整个导电层中均匀迁移和均匀分布，这确保跨越整个光电传感器阵列的均匀偏压。 本发明的偏置方案允许在不使用引线接合的情况下实现光电传感器的批量生产。
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24.发明申请公开(公告)号：US20070145523A1
公开(公告)日：2007-06-28
申请号：US11319056
申请日：2005-12-28
申请人： Eugene Chow , Koenraad Schuylenbergh , David Fork , JengPing Lu
发明人： Eugene Chow , Koenraad Schuylenbergh , David Fork , JengPing Lu
IPC分类号： H01L29/00
CPC分类号： H01G5/18 , B81B3/0051 , H01F17/0006 , H01F17/02 , H01F21/04 , H01F27/40 , H01L28/10 , H01L28/60
摘要： Method for integrally forming high Q tunable capacitors and high Q inductors on a substrate are described. A variable capacitors may employ stops between a moveable electrode and a fixed electrode to reduce and/or prevent electrical shorting between the moveable and fixed electrode. A capacitor may employ a split bottom electrode structure to removing a suspension portion of a moveable top electrode from an RF part of a circuit.
摘要翻译： 描述了在衬底上整体形成高Q可调电容器和高Q电感器的方法。 可变电容器可以在可移动电极和固定电极之间使用停止以减少和/或防止可移动和固定电极之间的电短路。 电容器可以采用分离的底部电极结构来从电路的RF部分去除可移动顶部电极的悬挂部分。
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25.发明申请Systems and methods for biasing high fill-factor sensor arrays and the like 审中-公开用于偏置高填充因子传感器阵列等的系统和方法公开(公告)号：US20060255422A1
公开(公告)日：2006-11-16
申请号：US11491998
申请日：2006-07-25
申请人： JengPing Lu , James Boyce , Kathleen Boyce
发明人： JengPing Lu , James Boyce , Kathleen Boyce
IPC分类号： H01L31/00
CPC分类号： H01L27/1446 , H01L31/105
摘要： A high fill-factor photosensor array is formed comprising a P-layer, an I-layer, one or more semiconductor structures adjacent to the I-layer and each coupled to a N-layer, an electrically conductive electrode formed on top of the P-layer, and an additional semiconductor structure, adjacent to the N-layer and which is electrically connected to a voltage bias source. The bias voltage applied to the additional semiconductor structure charges the additional semiconductor structure, thereby creating a tunneling effect between the N-layer and the P-layer, wherein electrons leave the N-layer and reach the P-layer and the electrically conductive layer. The electrons then migrate and distribute uniformly throughout the electrically conductive layer, which ensures a uniform bias voltage across to the entire photosensor array. The biasing scheme in the invention allows to achieve mass production of photosensors without the use of wire bonding.
摘要翻译： 形成高填充因子光电传感器阵列，其包括P层，I层，与I层相邻并且各自耦合到N层的一个或多个半导体结构，形成在P的顶部上的导电电极 以及与N层相邻并且与电压偏置源电连接的附加半导体结构。 施加到附加半导体结构的偏置电压对附加的半导体结构进行充电，从而在N层和P层之间产生隧穿效应，其中电子离开N层并到达P层和导电层。 电子然后在整个导电层中均匀迁移和均匀分布，这确保跨越整个光电传感器阵列的均匀偏压。 本发明的偏置方案允许在不使用引线接合的情况下实现光电传感器的批量生产。
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