公开(公告)号：US20100015772A1

公开(公告)日：2010-01-21

申请号：US12567050

申请日：2009-09-25

申请人： Yasuyuki SAYAMA ,  Tetsuya Okada ,  Makoto Oikawa ,  Hiroyasu Ishida ,  Kazunari Kushiyama

发明人： Yasuyuki SAYAMA ,  Tetsuya Okada ,  Makoto Oikawa ,  Hiroyasu Ishida ,  Kazunari Kushiyama

IPC分类号： H01L21/336 ,  H01L21/28

CPC分类号： H01L29/7802 ,  H01L29/0878 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/66712

摘要： An n type impurity region is provided below a gate electrode. By setting a gate length to be less than a depth of a channel region, a side surface of the channel region and a side surface of the n type impurity region adjacent to the channel region form a substantially perpendicular junction surface. Thus, since a depletion layer widens uniformly in a depth direction of a substrate, it is possible to secure a predetermined breakdown voltage. Furthermore, since an interval between the channel regions, above which the gate electrode is disposed, is uniform from its surface to its bottom, it is possible to increase an impurity concentration of the n type impurity region, resulting in an achievement of a low on-resistance.

摘要翻译： 在栅电极的下方设置有n型杂质区。 通过将栅极长度设置为小于沟道区的深度，沟道区的侧表面和与沟道区相邻的n型杂质区的侧表面形成基本上垂直的接合表面。 因此，由于耗尽层在衬底的深度方向上均匀地变宽，因此可以确保预定的击穿电压。 此外，由于栅极电极上方的沟道区域之间的间隔从表面到底部均匀，所以可以增加n型杂质区域的杂质浓度，导致实现低的导通 -抵抗性。

公开(公告)号：US20070072352A1

公开(公告)日：2007-03-29

申请号：US11519208

申请日：2006-09-12

申请人： Kazunari Kushiyama ,  Tetsuya Okada ,  Makoto Oikawa ,  Hiroyasu Ishida ,  Yasuyuki Sayama

发明人： Kazunari Kushiyama ,  Tetsuya Okada ,  Makoto Oikawa ,  Hiroyasu Ishida ,  Yasuyuki Sayama

IPC分类号： H01L21/337 ,  H01L21/8242 ,  H01L21/336

CPC分类号： H01L29/7802 ,  H01L29/0878 ,  H01L29/41766 ,  H01L29/42372 ,  H01L29/4238 ,  H01L29/66712 ,  H01L29/66727

摘要： A separation hole is provided in the center of the gate electrode. Accordingly, it is possible to suppress a drastic increase in feedback capacitance Crss in the case where drain-source voltage VDS is decreased and the width of the depletion layer is narrowed. Thus, high-frequency switching characteristics are improved. Moreover, n type impurities are implanted from the separation hole to form an n type impurity region between channel regions. Since a resistance in a portion below the gate electrode can be reduced, an on-resistance can be reduced. The n type impurity region can be formed in a self-aligning manner.

摘要翻译： 在栅电极的中心设置有分离孔。 因此，在漏极 - 源极电压VDS降低并且耗尽层的宽度变窄的情况下，可以抑制反馈电容Crss急剧增加。 因此，提高了高频开关特性。 此外，从分离孔注入n型杂质，在沟道区域之间形成n型杂质区。 由于可以减小栅电极下方的电阻，所以可以降低导通电阻。 可以以自对准的方式形成n型杂质区域。

公开(公告)号：US20050184355A1

公开(公告)日：2005-08-25

申请号：US11063739

申请日：2005-02-24

申请人： Tetsuya Okada

发明人： Tetsuya Okada

IPC分类号： H01L29/00 ,  H01L29/06 ,  H01L29/47 ,  H01L29/872

CPC分类号： H01L29/0692 ,  H01L29/0619 ,  H01L29/872

摘要： Conventionally, a guard ring for securing a breakdown voltage is provided around a Schottky barrier diode. Since the guard ring is a p+ type region, a depletion layer expands around the guard ring when a reverse voltage is applied to prevent a reduction in capacitance. In addition, there is a problem in that, when a forward voltage is applied, holes are injected from the guard ring if the applied voltage exceeds a predetermined voltage and high-speed operation cannot be realized. To solve the problems, a trench is provided in a guard ring region of the conventional technique and an insulating film is provided inside the trench. The trench is provided to reach an n+ type semiconductor substrate. Consequently, since the depletion layer expands only in a depth direction until the depletion layer reaches the n+ type semiconductor substrate, it is possible to realize a reduction in capacitance. In addition, since the p+ type region is made unnecessary, a reverse recovery time (Trr) does not occur. Therefore, it is possible to improve switching operation speed.

摘要翻译： 通常，在肖特基势垒二极管周围设置用于确保击穿电压的保护环。 由于保护环是p +型区域，所以当施加反向电压时，耗尽层围绕保护环扩展以防止电容降低。 此外，存在如下问题：当施加正向电压时，如果施加的电压超过预定电压并且不能实现高速操作，则从保护环注入空穴。 为了解决这些问题，在传统技术的保护环区域中设置沟槽，并且在沟槽内部设置绝缘膜。 提供沟槽以到达n +型半导体衬底。 因此，由于耗尽层仅在深度方向上扩展直到耗尽层到达n +型半导体衬底，所以可以实现电容的减小。 此外，由于不需要p +型区域，所以不会发生反向恢复时间（Trr）。 因此，能够提高开关动作速度。

公开(公告)号：US20050133814A1

公开(公告)日：2005-06-23

申请号：US10958640

申请日：2004-10-06

申请人： Tetsuya Yoshida ,  Tetsuya Okada ,  Hiroaki Saito ,  Shigeyuki Murai ,  Kikuo Okada

发明人： Tetsuya Yoshida ,  Tetsuya Okada ,  Hiroaki Saito ,  Shigeyuki Murai ,  Kikuo Okada

IPC分类号： H01L29/70 ,  H01L29/06 ,  H01L29/73 ,  H01L29/739 ,  H01L29/78 ,  H01L29/80 ,  H01L29/423

CPC分类号： H01L29/7397 ,  H01L29/0619

摘要： In a conventional semiconductor device, there was a problem that, in a guard ring region, a shape of a depletion layer is distorted and stable withstand voltage characteristics cannot be obtained. In a semiconductor device of the present invention, a thermal oxide film in an actual operation region and a thermal oxide film in a guard ring region are formed in the same process. Thereafter, the thermal oxide film is once removed and is formed again. Thus, a film thickness of the thermal oxide film on the upper surface of the guard ring region is set to, for example, about 8000 to 10000 Å. Accordingly, a CVD oxide film including moving ions is formed in a position distant from a surface of an epitaxial layer. Consequently, distortion of a depletion layer, which is influenced by the moving ions, is suppressed and desired withstand voltage characteristics can be maintained.

摘要翻译： 在传统的半导体器件中，存在在保护环区域中耗尽层的形状变形而不能得到稳定的耐电压特性的问题。 在本发明的半导体装置中，以相同的工序形成实际工作区域中的热氧化膜和防护环区域的热氧化膜。 此后，热氧化膜被一次除去并再次形成。 因此，保护​​环区域的上表面上的热氧化膜的膜厚设定为例如约8000〜10000。 因此，包含移动离子的CVD氧化膜形成在远离外延层的表面的位置。 因此，受到移动离子影响的耗尽层的失真被抑制，并且可以保持期望的耐受电压特性。

公开(公告)号：US5789924A

公开(公告)日：1998-08-04

申请号：US822235

申请日：1997-03-20

申请人： Tetsuya Okada

发明人： Tetsuya Okada

IPC分类号： G01R31/36 ,  G01N27/416

CPC分类号： G01R31/361 ,  G01R31/3648 ,  G01R31/3662

摘要： The method of calculating rechargeable battery charge capacity of this invention has steps to temporarily interrupt charging and calculate battery internal impedance, to calculate a no-load battery voltage by subtracting the product of internal impedance and charging current from the battery voltage when charging current is supplied, to calculate charging power by multiplying no-load voltage and charging current, and to repeatedly perform the charging power calculation integrating that charging power result to compute battery charge capacity.

摘要翻译： 计算本发明的可再充电电池充电容量的方法具有暂时中断充电并计算电池内部阻抗的步骤，通过从充电电流供给时从电池电压减去内部阻抗和充电电流的乘积来计算空载电池电压 通过乘以空载电压和充电电流来计算充电功率，并且重复执行将该充电电力结果积分的充电功率计算来计算电池充电容量。

公开(公告)号：US5684386A

公开(公告)日：1997-11-04

申请号：US544795

申请日：1995-10-18

申请人： Tetsuya Okada

发明人： Tetsuya Okada

IPC分类号： H02J7/10 ,  H01M10/44 ,  H02J7/00

CPC分类号： H01M10/44 ,  H02J7/0093

摘要： A secondary battery is charged in alternating charging and pulse-charging periods in which the secondary battery is continuously charged during the charging periods and the secondary battery is charged in a series of charging pulses during the pulse-charging periods. The terminal voltage or the temperature of the secondary battery may be sampled during at least one interval between the pulses in a pulse-charging period to detect a full charge level or an excessive temperature, respectively. Such an arrangement can reduce charging time and facilitate accurate monitoring of the terminal voltage or the temperature.

摘要翻译： 二次电池在充电期间二次电池连续充电的交替充电和脉冲充电期间被充电，并且在脉冲充电期间二次电池以一系列充电脉冲充电。 可以在脉冲充电期间的脉冲之间的至少一个间隔期间对二次电池的端子电压或温度进行采样，以分别检测完全充电电平或过高温度。 这样的布置可以减少充电时间并且有助于精确地监测端子电压或温度。

公开(公告)号：US5355072A

公开(公告)日：1994-10-11

申请号：US916746

申请日：1992-07-22

申请人： Eiji Satsuma ,  Tetsuya Okada ,  Takahiro Yamashita

发明人： Eiji Satsuma ,  Tetsuya Okada ,  Takahiro Yamashita

IPC分类号： H01M10/44 ,  H02J7/00 ,  H02J7/10

CPC分类号： H02J7/0075 ,  H01M10/44 ,  Y10S320/16

摘要： A battery discharging apparatus is provided with a battery discharger and a control unit. The control unit is provided with a current sensor and a battery power capacity sensor. The control unit directs the discharger to recover battery capacity lost due to memory effect using a deep memory effect eliminating discharge.

摘要翻译： 电池放电装置设置有电池放电器和控制单元。 控制单元设有电流传感器和电池电力容量传感器。 控制单元引导放电器使用深度记忆效应消除放电，以恢复由于记忆效应而损失的电池容量。

公开(公告)号：US4096543A

公开(公告)日：1978-06-20

申请号：US735505

申请日：1976-10-26

申请人： Nobuhiko Kozuka ,  Shoji Matsumoto ,  Tetsuya Okada ,  Katsuhiko Gotoda ,  Tatsuo Aizawa

发明人： Nobuhiko Kozuka ,  Shoji Matsumoto ,  Tetsuya Okada ,  Katsuhiko Gotoda ,  Tatsuo Aizawa

IPC分类号： G03G15/02 ,  H01T19/00 ,  H05F3/04

CPC分类号： G03G15/0291 ,  H01T19/00

摘要： A corona discharge device including a corona discharge electrode, an opposing electrode disposed opposite to the corona discharge electrode, a high voltage alternate current source electrically connected between the two electrodes, and a grid provided in a corona discharge current flow path between the two electrodes. The grid is grounded through a nonlinear bias element.

摘要翻译： 一种电晕放电装置，包括电晕放电电极，与电晕放电电极相对设置的对置电极，电连接在两个电极之间的高压交流电源，以及设置在两个电极之间的电晕放电电流流路中的栅极。 电网通过非线性偏置元件接地。

公开(公告)号：US09277298B2

公开(公告)日：2016-03-01

申请号：US13562523

申请日：2012-07-31

申请人： Jong-Woon Yang ,  Tetsuya Okada ,  Eui-Jeong Hwang

发明人： Jong-Woon Yang ,  Tetsuya Okada ,  Eui-Jeong Hwang

IPC分类号： H04Q9/00

CPC分类号： H04Q9/00 ,  H04Q2209/886 ,  Y02P80/23 ,  Y02P90/50 ,  Y10T307/344 ,  Y10T307/352 ,  Y10T307/696

摘要： An energy storage system having a number of trays with each tray having a number of battery cells in which power is controllably stored and discharged. A first Battery Management System (BMS) is electrically coupled to a tray contained in a rack of trays. A second BMS is electrically coupled to and controls the first BMS. The first BMS includes a control unit electrically coupled to and controlling the battery cells. It further includes a switch unit electrically coupled to the control unit and selectively applying driving power according to a control signal from the second BMS.

摘要翻译： 一种具有多个托盘的能量存储系统，每个托盘具有多个电池单元，其中电力被可控地存储和放电。 第一电池管理系统（BMS）电耦合到托盘架中的托盘。 第二个BMS电耦合到并控制第一个BMS。 第一BMS包括电耦合到并控制电池单元的控制单元。 其还包括电耦合到控制单元并根据来自第二BMS的控制信号选择性地施加驱动功率的开关单元。

公开(公告)号：US08373246B2

公开(公告)日：2013-02-12

申请号：US12816499

申请日：2010-06-16

申请人： Seiji Miyoshi ,  Tetsuya Okada ,  Shiho Arimoto

发明人： Seiji Miyoshi ,  Tetsuya Okada ,  Shiho Arimoto

IPC分类号： H01L29/66

CPC分类号： H01L27/0814 ,  H01L29/1608 ,  H01L29/6606 ,  H01L29/66143 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

摘要： Provided is a semiconductor device having an anode of a Si-FRD and a cathode of a Si-SBD which are serially connected. The Si-SBD has a junction capacitance whose amount of accumulable charge is equal to or more than an amount of charge occurring at the time of reverse recovery of the Si-FRD, and has a lower breakdown voltage than the Si-FRD does.

摘要翻译： 提供了具有串联连接的Si-FRD的阳极和Si-SBD的阴极的半导体器件。 Si-SBD具有可累积电荷量等于或大于Si-FRD反向恢复时发生的电荷量的结电容，并且具有比Si-FRD低的击穿电压。