Symbol by symbol variable code rate capable communication device
    21.
    发明授权
    Symbol by symbol variable code rate capable communication device 有权
    符号可变码率符号符号通讯装置

    公开(公告)号:US07472335B1

    公开(公告)日:2008-12-30

    申请号:US10338185

    申请日:2003-01-08

    IPC分类号: H03M13/03

    摘要: Symbol by symbol variable code rate capable communication device. A communication device is operable to perform processing of a variable code rate signal whose code rate varies on a symbol by symbol basis. This may involve performing encoding of input to generate the variable code rate signal; alternatively, this may involve performing decoding of a variable code rate signal. In doing so, this approach may involve using a single encoder and/or decoder (depending on the application). In some instances, a single device is operable to encode a first variable code rate signal (for transmission to another device) and to decode a second variable code rate signal (that has been received from another device). In addition, a method of coding (including one or both of encoding and decoding) may also operate of a variable code rate signal whose code rate varies on a symbol by symbol basis.

    摘要翻译: 符号可变码率符号符号通讯装置。 通信装置可操作以执行码率根据符号依次变化的可变码率信号的处理。 这可以涉及执行输入的编码以生成可变码率信号; 或者,这可能涉及执行可变码率信号的解码。 在这样做时,该方法可能涉及使用单个编码器和/或解码器(取决于应用)。 在一些情况下,单个设备可操作地对第一可变码率信号(用于传输到另一设备)进行编码并对第二可变码率信号(已从另一设备接收到的信号)进行解码。 此外,编码(包括编码和解码中的一个或两个)的方法也可以对码率根据符号依次变化的可变码率信号进行操作。

    LDPC (low density parity check) coded modulation hybrid decoding
    23.
    发明授权
    LDPC (low density parity check) coded modulation hybrid decoding 有权
    LDPC(低密度奇偶校验)编码调制混合解码

    公开(公告)号:US07185270B2

    公开(公告)日:2007-02-27

    申请号:US10723574

    申请日:2003-11-26

    IPC分类号: G06F11/00 H03M13/00

    摘要: LDPC (Low Density Parity Check) coded modulation hybrid decoding. A novel approach is presented wherein a combination of bit decoding and symbol level decoding (e.g., hybrid decoding) is performed for LDPC coded signals. Check node updating and symbol node updating are successively and alternatively performed on bit edge messages for a predetermined number of decoding iterations or until a sufficient degree of precision is achieved. The symbol node updating of the bit edge messages involves using symbol metrics corresponding to the symbol being decoded as well as the bit edge messages most recently updated by check node updating. The check node updating of the bit edge messages involves using the bit edge messages most recently updated by symbol node updating. The symbol node updating also involves computing possible soft symbol estimates for the symbol during each decoding iteration.

    摘要翻译: LDPC(低密度奇偶校验)编码调制混合解码。 提出了一种新颖的方法,其中对LDPC编码信号执行比特解码和符号级解码(例如混合解码)的组合。 对于预定数量的解码迭代,或直到达到足够的精确度,连续替代地对位边消息执行检查节点更新和符号节点更新。 位边消息的符号节点更新涉及使用与被解码的符号相对应的符号度量以及最近由校验节点更新更新的位边消息。 位边消息的校验节点更新涉及使用最近通过符号节点更新更新的位边消息。 符号节点更新还涉及在每次解码迭代期间计算符号的可能的软符号估计。

    16 QAM and 16 APSK TTCM (Turbo Trellis Coded Modulation) with minimum bandwidth efficiency of 3 bit/s/Hz using a rate 2/4 constituent encoder
    25.
    发明授权
    16 QAM and 16 APSK TTCM (Turbo Trellis Coded Modulation) with minimum bandwidth efficiency of 3 bit/s/Hz using a rate 2/4 constituent encoder 有权
    16个QAM和16个APSK TTCM(Turbo Trellis编码调制),最小带宽效率为3位/ s / Hz,使用速率2/4组成编码器

    公开(公告)号:US07062700B2

    公开(公告)日:2006-06-13

    申请号:US10636008

    申请日:2003-08-07

    IPC分类号: H03M13/03

    摘要: 16 QAM (Quadrature Amplitude Modulation) and 16 APSK (Asymmetric Phase Shift Keying) TTCM (Turbo Trellis Coded Modulation) with minimum bandwidth efficiency of 3 bit/s/Hz (bits per second per Hertz) using a rate 2/4 constituent encoder. Various encoder designs are presented that are operable to generate a signal whose modulation may vary as frequently as on a symbol by symbol basis while providing relatively very high throughput. Rate control sequences including RCs (Rate Controls), arranged in a period, govern the manner in which symbols of a signal are generated. The RCs correspond to various modulations that may each have a unique constellation and corresponding mapping. Different RCs may be included within a rate control sequence that correspond to 16 QAM, 16 APSK, QPSK (Quadrature Phase Shift Key), or even other modulation types. In addition, 1 or more uncoded bits may be used to generate the symbols of the coded signal.

    摘要翻译: 使用速率2/4分量编码器,具有最小带宽效率为3位/ s / Hz(每赫兹每秒赫兹)的TTCM(Turbo网格编码调制)和16 APSK(非对称相移键控)TAPM(非对称相移键控))。 提供了各种编码器设计,其可操作以产生其调制可以像逐个符号基础一样频繁地变化的信号,同时提供相对非常高的吞吐量。 包括RC(速率控制)在内的速率控制序列被布置在一个周期内,控制信号的符号产生的方式。 RC对应于各自可以具有独特的星座和相应映射的各种调制。 不同的RC可以包括在对应于16QAM,16APSK,QPSK(正交相移键))或甚至其它调制类型的速率控制序列中。 此外,可以使用1个或多个未编码比特来生成编码信号的符号。

    True bit level decoding of TTCM (turbo trellis coded modulation) of variable rates and signal constellations
    27.
    发明授权
    True bit level decoding of TTCM (turbo trellis coded modulation) of variable rates and signal constellations 有权
    真正的比特级解码TTCM(turbo网格编码调制)的可变速率和信号星座

    公开(公告)号:US08473822B2

    公开(公告)日:2013-06-25

    申请号:US12627438

    申请日:2009-11-30

    IPC分类号: H03M13/45

    摘要: True bit level decoding of TTCM (Turbo Trellis Coded Modulation) of variable rates and signal constellations. A decoding approach is presented that allows for decoding on a bit level basis that allows for discrimination of the individual bits of a symbol. Whereas prior art approaches typically perform decoding on a symbol level basis, this decoding approach allows for an improved approach in which the hard decisions/best estimates may be made individually for each of the individual bits of an information symbol. In addition, the decoding approach allows for a reduction in the total number of calculations that need to be performed as well as the total number of values that need to be stored during the iterative decoding. The bit level decoding approach is also able to decode a signal whose code rate and/or signal constellation type (and mapping) may vary on a symbol by symbol basis.

    摘要翻译: TTCM(Turbo Trellis编码调制)的可变速率和信号星座的真位解码。 提出了一种解码方法,其允许基于比特级的解码,其允许区分符号的各个比特。 而现有技术方法通常在符号级基础上执行解码,这种解码方法允许改进的方法,其中可以针对信息符号的各个比特分别进行硬判决/最佳估计。 此外,解码方法允许减少需要执行的计算的总数以及在迭代解码期间需要存储的值的总数。 比特级解码方法还能够解码其码率和/或信号星座类型(和映射)可以在逐个符号的基础上变化的信号。

    Asymmetrical MIMO wireless communications
    28.
    发明授权
    Asymmetrical MIMO wireless communications 失效
    不对称MIMO无线通信

    公开(公告)号:US08437362B2

    公开(公告)日:2013-05-07

    申请号:US13558985

    申请日:2012-07-26

    IPC分类号: H04W76/00

    CPC分类号: H04B7/0613 H04B7/0413

    摘要: A method for asymmetrical MIMO wireless communication begins by determining a number of transmission antennas for the asymmetrical MIMO wireless communication. The method continues by determining a number of reception antennas for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas exceeds the number of reception antennas, using spatial time block coding for the asymmetrical MIMO wireless communication. The method continues by, when the number of transmission antennas does not exceed the number of reception antennas, using spatial multiplexing for the asymmetrical MIMO wireless communication.

    摘要翻译: 一种用于非对称MIMO无线通信的方法是通过确定用于非对称MIMO无线通信的多个发送天线来开始的。 该方法通过确定用于非对称MIMO无线通信的接收天线的数量来继续。 当发送天线的数量超过接收天线的数量时,该方法继续使用用于非对称MIMO无线通信的空间时间块编码。 当发送天线的数量不超过接收天线的数量时,该方法继续使用用于非对称MIMO无线通信的空间复用。

    LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices
    29.
    发明申请
    LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices 有权
    具有用CSI(循环移位身份)和空子矩阵选择性构造的相应奇偶校验矩阵的LDPC(低密度奇偶校验)码

    公开(公告)号:US20120192029A1

    公开(公告)日:2012-07-26

    申请号:US13423381

    申请日:2012-03-19

    IPC分类号: H03M13/05 G06F11/10

    摘要: LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices. An LDPC matrix corresponding to an LDPC code is employed within a communication device to encode and/or decode coded signals for use in any of a number of communication systems. The LDPC matrix is composed of a number of sub-matrices and may be partitioned into a left hand side matrix and a right hand side matrix. The right hand side matrix may include two sub-matrix diagonals therein that are composed entirely of CSI (Cyclic Shifted Identity) sub-matrices; one of these two sub-matrix diagonals is located on the center sub-matrix diagonal and the other is located just to the left thereof. All other sub-matrices of the right hand side matrix may be null sub-matrices (i.e., all elements therein are values of zero “0”).

    摘要翻译: 具有用CSI(循环移位身份)和空子矩阵选择性构造的相应奇偶校验矩阵的LDPC(低密度奇偶校验)码。 在通信设备内采用对应于LDPC码的LDPC矩阵来编码和/或解码用于多个通信系统中的任何一个的编码信号。 LDPC矩阵由多个子矩阵组成,并且可以被划分为左手侧矩阵和右手侧矩阵。 右手侧矩阵可以包括其中完全由CSI(循环移位身份)子矩阵组成的两个子矩阵对角线; 这两个子矩阵对角线之一位于中心子矩阵对角线上,另一个位于其左侧。 右侧方矩阵的所有其他子矩阵可以是空子矩阵(即,其中的所有元素为零“0”)。