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    Method for improving processor performance
    22.
    发明授权
    Method for improving processor performance 失效
    提高处理器性能的方法

    公开(公告)号：US06961800B2

    公开(公告)日：2005-11-01

    申请号：US09967155

    申请日：2001-09-28

    申请人： Robert A. Lester ,  Kenneth T. Chin ,  Jim Blocker ,  John E. Larson ,  Phillip M. Jones ,  Paul B. Rawlins

    发明人： Robert A. Lester ,  Kenneth T. Chin ,  Jim Blocker ,  John E. Larson ,  Phillip M. Jones ,  Paul B. Rawlins

    IPC分类号： G06F13/00 ,  G06F13/16 ,  G06F13/36

    CPC分类号： G06F13/1657

    摘要： Methods for improving processor performance. Specifically, by reducing some of the latency cycles within a host controller, request processing speed can be improved. One technique for improving processing speed involves initiating a deferred reply transaction before the data is available from a memory controller. A second technique involves anticipating the need to transition from a block next request (BNR) state to a bus priority request (BPRI) state, thereby eliminating the need to wait for a request check to determine if the BPRI state must be implemented.

    摘要翻译： 提高处理器性能的方法。 具体地，通过减少主机控制器内的一些延迟周期，可以提高请求处理速度。 用于提高处理速度的一种技术涉及在从存储器控制器获得数据之前发起延迟回复事务。 第二种技术涉及预期从块下一个请求（BNR）状态转换到总线优先级请求（BPRI）状态的需要，从而消除了等待请求检查以确定是否必须实现BPRI状态的需要。

    System and method for maintaining ownership of a processor bus while sending a programmed number of snoop cycles to the processor cache
    23.
    发明授权
    System and method for maintaining ownership of a processor bus while sending a programmed number of snoop cycles to the processor cache 有权
    当将处理器总线的编程数量发送到处理器高速缓存时，维持处理器总线的所有权的系统和方法

    公开(公告)号：US06275885B1

    公开(公告)日：2001-08-14

    申请号：US09164191

    申请日：1998-09-30

    申请人： Kenneth T. Chin ,  Michael J. Collins ,  John E. Larson ,  Robert A. Lester

    发明人： Kenneth T. Chin ,  Michael J. Collins ,  John E. Larson ,  Robert A. Lester

    IPC分类号： G06F1300

    CPC分类号： G06F12/0831 ,  G06F13/16

    摘要： A computer is provided having a bus interface unit coupled between a CPU bus, a peripheral bus (i.e., PCI bus and/or graphics bus), and a memory bus. The bus interface unit includes controllers linked to the respective buses, and a plurality of queues placed within address and data paths between the various controllers. The peripheral bus controller can decode a write cycle to memory, and the processor controller can thereafter request and be granted ownership of the CPU local bus. The address of the write cycle can then be snooped to determine if valid data exists within the CPU cache storage locations. If so, a writeback operation can occur. Ownership of the CPU bus is maintained by the bus interface unit during the snooping operation, as well as during writeback and the request of the memory bus by the peripheral-derived write cycle. It is not until ownership of the memory bus is granted by the memory arbiter that mastership is terminated by the bus interface unit. Accordingly, the bus interface unit keeps CPU-derived cycles off the CPU bus to ensure memory arbiter grants ownership to a write cycle from the peripheral bus. In this fashion, data from the peripheral bus can be stored in system memory before accessing that data by a CPU read cycle. The number of snoop cycles which the bus interface unit can initiate is determined by configuration registers programmed during power on, reset or boot up of computer.

    摘要翻译： 提供一种计算机，其具有耦合在CPU总线，外围总线（即PCI总线和/或图形总线）之间的总线接口单元和存储器总线。 总线接口单元包括链接到相应总线的控制器，以及放置在各种控制器之间的地址和数据路径内的多个队列。 外设总线控制器可以将写周期解码为存储器，然后处理器控制器可以请求并授予CPU本地总线的所有权。 然后可以窥探写周期的地址，以确定CPU高速缓存存储位置中是否存在有效数据。 如果是这样，可以进行回写操作。 CPU总线的所有权在侦听操作期间由总线接口单元维护，以及通过外设来源的写周期在写回和存储器总线的请求期间保持。 直到存储器总线的所有权由总线接口单元终止主存的存储器仲裁器才被授予。 因此，总线接口单元将CPU派生的周期从CPU总线保持，以确保存储器仲裁器将所有权授予来自外设总线的写周期。 以这种方式，通过CPU读取周期访问该数据之前，来自外围总线的数据可以存储在系统存储器中。 总线接口单元可以启动的窥探周期数由计算机上电，复位或启动时编程的配置寄存器决定。

    Technique for improving processor performance
    25.
    发明授权
    Technique for improving processor performance 失效
    提高处理器性能的技术

    公开(公告)号：US07120758B2

    公开(公告)日：2006-10-10

    申请号：US10365018

    申请日：2003-02-12

    申请人： Phillip M. Jones ,  Robert A. Lester ,  Jens K. Ramsey ,  William J. Walker ,  John E. Larson ,  James Andre ,  Paul Rawlins

    发明人： Phillip M. Jones ,  Robert A. Lester ,  Jens K. Ramsey ,  William J. Walker ,  John E. Larson ,  James Andre ,  Paul Rawlins

    IPC分类号： G06F12/00 ,  G06F3/00

    CPC分类号： G06F13/1673

    摘要： Method and apparatus for improving processor performance. In some embodiments, processing speed may be improved by reusing data stored in a buffer during an initial request by subsequent requests. Assignment of temporary storage buffers in a controller may be made to allow for the potential for reuse of the data. Further, a hot buffer may be designated to allow for reuse of the data stored in the hot buffer. On subsequent requests, data stored in the hot buffer may be sent to a requesting device without re-retrieving the data from memory.

    摘要翻译： 提高处理器性能的方法和装置。 在一些实施例中，可以通过在初始请求期间通过后续请求重用存储在缓冲器中的数据来改善处理速度。 控制器中的临时存储缓冲区的分配可以做出以允许数据重用的潜力。 此外，可以指定热缓冲器以允许重新使用存储在热缓冲器中的数据。 在随后的请求中，存储在热缓冲器中的数据可以被发送到请求设备而不从存储器重新检索数据。

    Apparatus and method for dynamically elevating a lower level bus master to an upper level bus master within a multi-level arbitration system
    26.
    发明授权
    Apparatus and method for dynamically elevating a lower level bus master to an upper level bus master within a multi-level arbitration system 有权
    一种用于在多级仲裁系统内动态地将较低级总线主机升级到上级总线主机的装置和方法

    公开(公告)号：US06272580B1

    公开(公告)日：2001-08-07

    申请号：US09268825

    申请日：1999-03-16

    申请人： Jeff Stevens ,  Robert A. Lester ,  Phillip M. Jones ,  Jeff W. Wolford ,  Peter Lee

    发明人： Jeff Stevens ,  Robert A. Lester ,  Phillip M. Jones ,  Jeff W. Wolford ,  Peter Lee

    IPC分类号： G06F13362

    CPC分类号： G06F13/362

    摘要： A computer system, bus interface unit, and method are provided to allocate requests to a shared bus within the computer system. The bus interface unit includes an arbiter which employs a multi-level, round-robin arbitration protocol. Configuration registers are programmed during boot-up of the computer system by assigning a subset of peripheral devices, bus agents, requesters, or bus masters to either a high priority ring or a low priority ring, if two levels of arbitration are used. The status of a low priority device can be elevated to equal priority with a high priority device by assigning the low priority device to a high priority port within the high priority ring if certain circumstances occur. Namely, if data transfers to or from the low priority device are terminated, then the low priority device will be promoted to a high priority device so that it need not wait until after the all high priority device requests have been polled. Instead, the elevated low priority device is placed on the same level of priority as the high priority devices so that its request can be readily serviced and the transaction completed during a data transfer retry operation.

    摘要翻译： 提供计算机系统，总线接口单元和方法以将计算机系统中的共享总线分配请求。 总线接口单元包括采用多级循环仲裁协议的仲裁器。 如果使用两级仲裁，配置寄存器在计算机系统引导期间被编程，通过将外设，总线代理，请求者或总线主机的子集分配到高优先级环或低优先级环。 如果发生某些情况，则可以通过将低优先级设备分配给高优先级环中的高优先级端口，将低优先级设备的状态提升为与高优先级设备相等的优先级。 也就是说，如果到低优先级设备的数据传输结束，则低优先级设备将被提升为高优先级设备，使得它不需要等到所有高优先级设备请求被轮询之后。 相反，升高的低优先级设备被放置在与高优先级设备相同的优先级上，使得其请求可以容易地被服务并且在数据传输重试操作期间完成事务。

    Acoustic dipole well logging instrument
    28.
    发明授权
    Acoustic dipole well logging instrument 失效
    声学双极测井仪

    公开(公告)号：US5731550A

    公开(公告)日：1998-03-24

    申请号：US813922

    申请日：1997-03-07

    申请人： Robert A. Lester ,  Paul Junghans

    发明人： Robert A. Lester ,  Paul Junghans

    IPC分类号： B06B1/06 ,  G01V1/52 ,  G01V1/40

    CPC分类号： B06B1/0603 ,  G01V1/523 ,  Y10S367/911

    摘要： A dipole acoustic well logging instrument including an acoustic transmitter. Receiver sections are disposed at axially spaced apart locations from the acoustic transmitter. Each receiver section includes an outer shoulder at each end adapted to be placed in acoustically isolated contact with an internal shoulder of a connector coupling when the instrument is in tension. The outer shoulders have an acoustically isolating material disposed on their surfaces. The receiver sections include an inner shoulder at each end adapted to be placed in direct contact with an external shoulder of the connector coupling when the instrument is in compression. The instrument includes one connector couplings disposed at each end of each receiver section to couple the receiver sections to each other and to the remainder of the instrument. At least one receiver element is disposed in a passage formed into each of the receiver sections. In one embodiment of the invention, the receiver element can be a bimorph-type dipole acoustic sensor. In another embodiment, the receiver element can be formed from a plurality of radially spaced apart piezoelectric elements.

    摘要翻译： 包括声发射器的偶极声测井仪器。 接收器部分设置在离声发射器的轴向间隔开的位置处。 每个接收器部分包括在每个端部处的外肩部，其适于在器械处于张力时与连接器联接器的内部肩部放置在声隔离接触中。 外肩部具有设置在其表面上的隔音材料。 接收器部分包括在每个端部处的内肩部，其适于在仪器处于压缩状态时与连接器联接器的外肩部直接接触。 仪器包括设置在每个接收器部分的每个端部处的一个连接器联接器，以将接收器部分彼此连接并连接到仪器的其余部分。 至少一个接收器元件设置在形成每个接收器部分的通道中。 在本发明的一个实施例中，接收器元件可以是双压电晶片型偶极子声学传感器。 在另一个实施例中，接收器元件可以由多个径向隔开的压电元件形成。

    Method and apparatus for cement bond tool
    29.
    发明授权
    Method and apparatus for cement bond tool 失效
    水泥粘合工具的方法和装置

    公开(公告)号：US4893285A

    公开(公告)日：1990-01-09

    申请号：US195443

    申请日：1988-05-12

    申请人： Jean P. H. R. M. Masson ,  Lee H. Gollwitzer ,  Robert A. Lester

    发明人： Jean P. H. R. M. Masson ,  Lee H. Gollwitzer ,  Robert A. Lester

    IPC分类号： E21B47/00 ,  G01V1/44

    CPC分类号： E21B47/0005 ,  G01V1/44

    摘要： In accordance with principles of the present invention methods and apparatus are provided for evaluating the quality of the cement bond in cased boreholes. Acoustic energy is used to excite the borehole-casing-annulus-formation system and the quality of the cement bond is determined by examining the ratios of the signals received by two longitudinally spaced apart receivers supported on a sonde. The acoustic energy is generated by two transmitters symmetrically disposed above and below the receivers along the sonde. The spacings between the receivers themselves and between the receivers and the transmitters are selected so as to enhance the correlation between the ratios of the received signals and the quality of the cement bond log. An additional receiver, supported on the sonde at a small distance from one of the transmitters, is employed to determine the quality of the cement bond in hard formations.

    摘要翻译： 根据本发明的原理，提供了用于评估套管钻孔中的水泥粘合剂的质量的方法和装置。 声能被用于激发钻孔套管 - 环空形成系统，并且通过检查由主体上支撑的两个纵向间隔开的接收器接收的信号的比率来确定水泥接合质量。 声能由对称设置在探头的接收器上方和下方的两个发射器产生。 选择接收器本身之间以及接收器和发射器之间的间隔，以便增强接收信号的比率与水泥结合记录的质量之间的相关性。 使用一个额外的接收器，在距离其中一个发射器的距离较小的位置上在主探头上支撑，用于确定硬地层中水泥粘结的质量。

    Method and apparatus for cement bond logging
    30.
    发明授权
    Method and apparatus for cement bond logging 失效
    水泥债券采伐方法和装置

    公开(公告)号：US4757479A

    公开(公告)日：1988-07-12

    申请号：US394395

    申请日：1982-07-01

    申请人： Jean-Pierre H.R.M. Masson ,  Lee H. Gollwitzer ,  Robert A. Lester

    发明人： Jean-Pierre H.R.M. Masson ,  Lee H. Gollwitzer ,  Robert A. Lester

    IPC分类号： E21B47/00 ,  G01V1/44 ,  G01V1/40

    CPC分类号： E21B47/0005 ,  G01V1/44

    摘要： In accordance with principles of the present invention methods and apparatus are provided for evaluating the quality of the cement bond in cased boreholes. Acoustic energy is used to excite the borehole-casing-annulus-formation system and the quality of the cement bond is determined by examining the ratios of the signals received by two longitudinally spaced apart receivers supported on a sonde. The acoustic energy is generated by two transmitters symmetrically disposed above and below the receivers along the sonde. The spacings between the receivers themselves and between the receivers and the transmitters are selected so as to enhance the correlation between the ratios of the received signals and the quality of the cement bond log. An additional receiver, supported on the sonde at a small distance from one of the transmitters, is employed to determine the quality of the cement bond in hard formations.

    摘要翻译： 根据本发明的原理，提供了用于评估套管钻孔中的水泥粘合剂的质量的方法和装置。 声能被用于激发钻孔套管 - 环空形成系统，并且通过检查由主体上支撑的两个纵向间隔开的接收器接收的信号的比率来确定水泥接合质量。 声能由对称设置在探头的接收器上方和下方的两个发射器产生。 选择接收器本身之间以及接收器和发射器之间的间隔，以便增强接收信号的比率与水泥结合记录的质量之间的相关性。 使用一个额外的接收器，在距离其中一个发射器的距离较小的位置上在主探头上支撑，用于确定硬地层中水泥粘结的质量。