公开(公告)号：US12229072B2

公开(公告)日：2025-02-18

申请号：US18598382

申请日：2024-03-07

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Daniel Marcovitch ,  Dotan David Levi ,  Eyal Srebro ,  Eliel Peretz ,  Roee Moyal ,  Richard Graham ,  Gil Bloch ,  Sean Pieper

IPC: G06F13/42 ,  G06F7/76

Abstract: Devices, methods, and systems are provided. In one example, a device is described to include a device interface that receives data from at least one data source; a data shuffle unit that collects the data received from the at least one data source, receives a descriptor that describes a data shuffle operation to perform on the data received from the at least one data source, performs the data shuffle operation on the collected data to produce shuffled data, and provides the shuffled data to at least one data target.

公开(公告)号：US11966355B2

公开(公告)日：2024-04-23

申请号：US16224834

申请日：2018-12-19

Applicant: Mellanox Technologies, Ltd.

Inventor： Ariel Shahar ,  Roee Moyal ,  Ali Ayoub ,  Michael Kagan

IPC: G06F15/173 ,  G06F13/28 ,  G06F15/167 ,  H04L9/06 ,  H04L9/32

CPC classification number: G06F15/17331 ,  G06F13/28 ,  G06F15/167 ,  G06F15/1735 ,  H04L9/0631 ,  H04L9/0643 ,  H04L9/3247

Abstract: A network adapter includes a network interface that communicates packets over a network, a host interface connected locally to a host processor and to a host memory, and processing circuitry, coupled between the network interface and the host interface, and is configured to receive in a common queue, via the host interface, (i) a processing work item specifying a source buffer in the host memory, a data processing operation, and a first address in the host memory, and (ii) an RDMA write work item specifying the first address, and a second address in a remote memory. In response to the processing work item, the processing circuitry reads data from the source buffer, applies the data processing operation, and stores the processed data in the first address. In response to the RDMA write work item the processing circuitry transmits the processed data, over the network, for storage in the second address.

公开(公告)号：US20240080256A1

公开(公告)日：2024-03-07

申请号：US17901671

申请日：2022-09-01

Applicant: Mellanox Technologies, Ltd.

Inventor： Yamin Friedman ,  Idan Borshteen ,  Roee Moyal ,  Yuval Shpigelman

IPC: H04L45/12 ,  H04L43/0864 ,  H04L45/24 ,  H04L47/52

CPC classification number: H04L45/124 ,  H04L43/0864 ,  H04L45/24 ,  H04L47/52

Abstract: Technologies for spreading a single transport flow across multiple network paths in remote direct memory access (RDMA) over converged Ethernet (RoCE) and InfiniBand are described. A network interface controller receives a first packet and a second packet of a transport flow directed to a second node. The network interface controller assigns a first network routing identifier to the first packet and a second network routing identifier to the second packet, the first network routing identifier corresponding to a first network path between the first and second nodes, the second network routing identifier corresponding to a second network path between the first node and the second node. The network interface controller schedules a first packet of the transport flow to be sent via the first network path and a second packet of the transport flow to be sent via the second network path.

公开(公告)号：US20230409327A1

公开(公告)日：2023-12-21

申请号：US17844461

申请日：2022-06-20

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Dotan David Levi ,  Eliel Peretz ,  Richard Graham ,  Daniel Marcovitch ,  Gil Bloch ,  Roee Moyal ,  Eyal Srebro ,  Sean Midthun Pieper

IPC: G06F9/30 ,  G06F9/445

CPC classification number: G06F9/30192 ,  G06F9/30025 ,  G06F9/44542

Abstract: Devices, methods, and systems are provided. In one example, a device is described to include circuitry that collects data received from a data source, references a descriptor that describes a data reformat operation to perform on the data received from the data source, reformats the data received from the data source according to the data reformat operation, and provides the reformatted data to the data target via the second device interface.

公开(公告)号：US11847487B2

公开(公告)日：2023-12-19

申请号：US17331657

申请日：2021-05-27

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Ariel Shahar ,  Roee Moyal

IPC: G06F9/46 ,  G06F9/48 ,  G06F9/54

CPC classification number: G06F9/4843 ,  G06F9/546 ,  G06F2209/548

Abstract: A method using a memory and queue handling logic, including accessing a work control structure (WCS) configured “first-in-first-out” holding work control records (WCRs) each including a field defining work to be carried out and a completion indicator indicating whether the work has completed, and initially set to indicate that the work has not completed: upon fetching a work request (WR) for execution, pushing a WCR corresponding to the WR to the WCS, and: A) inspecting the WCR at a head of the WCS, B) when the completion indicator of the WCR at the head of the WCS indicates that the unit of work associated with the WCR at the head of the WCS has been completed, popping the WCR at the head of the WCS from the WCS, and reporting completion of the WCR at the head of the WCS to a host processor, and C) iteratively performing A, B, and C.

公开(公告)号：US20230362096A1

公开(公告)日：2023-11-09

申请号：US18106953

申请日：2023-02-07

Applicant: Mellanox Technologies, Ltd.

Inventor： Natan Manevich ,  Dotan David Levi ,  Roee Moyal

IPC: H04L47/22 ,  H04L47/263

CPC classification number: H04L47/225 ,  H04L47/263

Abstract: A system includes a device coupled to a processing device. The processing device is to receive a request to execute a plurality of workloads, the request comprising a rate to execute each workload of the plurality of workloads and a parameter value indicating an execution offset. The processing device is further to determine a sequence for executing the plurality of workloads based on receiving the rate and the parameter value, where the sequence is to execute each workload at the respective rate and each workload of the plurality of workloads is executed at a different time based on the parameter value. The processing device is to execute the plurality of workloads in accordance with the sequence upon determining the sequence to execute the plurality of workloads.

公开(公告)号：US20220407824A1

公开(公告)日：2022-12-22

申请号：US17899652

申请日：2022-08-31

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Gal Yefet ,  Daniel Marcovitch ,  Roee Moyal ,  Ariel Shahar ,  Gil Bloch ,  Lior Narkis

IPC: H04L49/9005 ,  H04L49/901 ,  H04L41/0604

Abstract: A network adapter includes a network interface, a host interface and processing circuitry. The network interface connects to a communication network for communicating with remote targets. The host interface connects to a host that accesses a Multi-Channel Send Queue (MCSQ) storing Work Requests (WRs) originating from client processes running on the host. The processing circuitry is configured to retrieve WRs from the MCSQ and distribute the WRs among multiple Send Queues (SQs) accessible by the processing circuitry, and retrieve WRs from the multiple NSQs and execute data transmission operations specified in the WRs retrieved from the multiple NSQs.

公开(公告)号：US20220398197A1

公开(公告)日：2022-12-15

申请号：US17863453

申请日：2022-07-13

Applicant: Mellanox Technologies, Ltd.

Inventor： Daniel Marcovitch ,  Gil Bloch ,  Richard Graham ,  Ariel Shahar ,  Roee Moyal ,  Igor Voks

IPC: G06F12/0813 ,  G06F12/06 ,  G06F9/54 ,  G06F9/50

Abstract: A network device in a communication network includes a controller and processing circuitry. The controller is configured to manage execution of an operation whose execution depends on inputs from a group of one or more work-request initiators. The processing circuitry is configured to read one or more values, which are set by the work-request initiators in one or more memory locations that are accessible to the work-request initiators and to the network device, and to trigger execution of the operation in response to verifying that the one or more values read from the one or more memory locations indicate that the work-request initiators in the group have provided the respective inputs.

公开(公告)号：US11451493B2

公开(公告)日：2022-09-20

申请号：US17142366

申请日：2021-01-06

Applicant: MELLANOX TECHNOLOGIES, LTD.

Inventor： Gal Yefet ,  Daniel Marcovitch ,  Roee Moyal ,  Ariel Shahar ,  Gil Bloch ,  Lior Narkis

IPC: H04N21/238 ,  H04L49/901 ,  H04L41/0604 ,  H04L49/253 ,  H04L49/9005

Abstract: A network adapter includes a network interface, a host interface and processing circuitry. The network interface connects to a communication network for communicating with remote targets. The host interface connects to a host that accesses a Multi-Channel Send Queue (MCSQ) storing Work Requests (WRs) originating from client processes running on the host. The processing circuitry is configured to retrieve WRs from the MCSQ and distribute the WRs among multiple Send Queues (SQs) accessible by the processing circuitry.

公开(公告)号：US20210406179A1

公开(公告)日：2021-12-30

申请号：US16916153

申请日：2020-06-30

Applicant: Mellanox Technologies, Ltd.

Inventor： Daniel Marcovitch ,  Gil Bloch ,  Richard Graham ,  Ariel Shahar ,  Roee Moyal ,  Igor Voks

IPC: G06F12/0813 ,  G06F12/06 ,  G06F9/50 ,  G06F9/54

Abstract: A network device in a communication network includes a controller and processing circuitry. The controller is configured to manage execution of an operation whose execution depends on inputs from a group of one or more work-request initiators. The processing circuitry is configured to read one or more values, which are set by the work-request initiators in one or more memory locations that are accessible to the work-request initiators and to the network device, and to trigger execution of the operation in response to verifying that the one or more values read from the one or more memory locations indicate that the work-request initiators in the group have provided the respective inputs.