公开(公告)号：US20130242653A1

公开(公告)日：2013-09-19

申请号：US13892743

申请日：2013-05-13

Applicant: MOSAID TECHNOLOGIES INCORPORATED

Inventor： Jin-Ki KIM

IPC: G11C16/34

CPC classification number: G11C16/34 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/12 ,  G11C16/344 ,  G11C16/3454 ,  G11C2211/5621

Abstract: A threshold voltage distribution scheme for multi-level Flash cells where an erase threshold voltage and at least one programmed threshold voltage lie in an erase voltage domain. Having at least one programmed threshold voltage in the erase voltage domain reduces the Vread voltage level to minimize read disturb effects, while extending the life span of the multi-level Flash cells as the threshold voltage distance between programmed states is maximized. The erase voltage domain can be less than 0V while a program voltage domain is greater than 0V. Accordingly, circuits for program verifying and reading multi-level Flash cells having a programmed threshold voltage in the erase voltage domain and the program voltage domain use negative and positive high voltages.

公开(公告)号：US20130229874A1

公开(公告)日：2013-09-05

申请号：US13867437

申请日：2013-04-22

Applicant: MOSAID TECHNOLOGIES INCORPORATED

Inventor： HakJune OH ,  Hong Beom PYEON ,  Jin-Ki KIM

IPC: G11C16/10

CPC classification number: G11C11/5628 ,  G06F1/12 ,  G11C7/1021 ,  G11C7/1051 ,  G11C7/1078 ,  G11C11/5642 ,  G11C16/06 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/3445 ,  G11C2207/107

Abstract: An apparatus, system, and method for controlling data transfer to an output port of a serial data link interface in a semiconductor memory is disclosed. In one example, a flash memory device may have multiple serial data links, multiple memory banks and control input ports that enable the memory device to transfer the serial data to a serial data output port of the memory device. In another example, a flash memory device may have a single serial data link, a single memory bank, a serial data input port, a control input port for receiving output enable signals. The flash memory devices may be cascaded in a daisy-chain configuration using echo signal lines to serially communicate between memory devices.

公开(公告)号：US20130163175A1

公开(公告)日：2013-06-27

申请号：US13720951

申请日：2012-12-19

Applicant: MOSAID TECHNOLOGIES INCORPORATED

Inventor： Jin-Ki KIM ,  Dae-Hee YI

IPC: G06F1/16

CPC classification number: G06F1/16 ,  G06F1/1658 ,  G06F3/0626 ,  G06F3/0658 ,  G06F3/0688 ,  G11C7/1003

Abstract: A solid-state drive architecture and arrangement for standardized disk drive form factors, PCI type memory cards and general motherboard memory. The solid-state drive architecture is modular in that a main printed circuit board (PCB) of the memory system includes a host interface connector, a memory controller, and connectors. Each connector can removably receive a memory blade, where each memory blade includes a plurality of memory devices serially connected to each other via a serial interface. Each memory blade includes a physical serial interface for providing data and control signals to a first memory device in the serial chain and for receiving data and control signals from a last memory device in the serial chain. Each memory blade can be sized in length and width to accommodate any number of memory devices on either side thereof.

Abstract translation: 一种用于标准化磁盘驱动器外形尺寸的固态驱动架构和布局，PCI型存储卡和通用主板内存。 固态驱动架构是模块化的，其中存储器系统的主印刷电路板（PCB）包括主机接口连接器，存储器控制器和连接器。 每个连接器可移除地接收存储器刀片，其中每个存储器刀片包括通过串行接口彼此串行连接的多个存储器件。 每个存储器刀片包括物理串行接口，用于向串行链中的第一存储器件提供数据和控制信号，并用于从串行链中的最后一个存储器件接收数据和控制信号。 每个存储器刀片的尺寸可以在长度和宽度上以适应其任一侧上的任何数量的存储器件。

公开(公告)号：US20130073754A1

公开(公告)日：2013-03-21

申请号：US13676606

申请日：2012-11-14

Applicant: Mosaid Technologies Incorporated

Inventor： Hong Beom PYEON ,  HakJune OH ,  Jin-Ki KIM

IPC: G06F13/00

CPC classification number: G06F13/4291

Abstract: A method or apparatus operates a multitude of devices in a serial interconnection configuration to establish a device identifier (ID) for each device. An input signal is transmitted through a serial interconnection to a first device using inputs that are also used by the first device to input other information thereto (e.g., data, commands, control signals). A generating circuit generates a device ID in response to the input signal. A transfer circuit then transfers an output signal associated with the device ID to a second device through a serial output of the first device. The serial output is also used by the first device to output other information (e.g., signals, data) to another device in the serial interconnection configuration.

Abstract translation: 一种方法或设备操作串行互连配置中的多个设备以建立每个设备的设备标识符（ID）。 输入信号通过使用也由第一设备用于输入其它信息（例如，数据，命令，控制信号）的输入通过串行互连传输到第一设备。 发生电路响应于输入信号产生装置ID。 传输电路然后通过第一设备的串行输出将与设备ID相关联的输出信号传送到第二设备。 串行输出也由第一设备用于在串行互连配置中向另一设备输出其他信息（例如，信号，数据）。