公开(公告)号：US09036397B2

公开(公告)日：2015-05-19

申请号：US13624761

申请日：2012-09-21

Applicant: MACRONIX International Co., Ltd.

Inventor： Wei-Chih Chien ,  Ming-Hsiu Lee ,  Feng-Ming Lee

IPC: G11C11/00 ,  G11C13/00 ,  G11C11/56 ,  H01L45/00 ,  H01L27/24

CPC classification number: G11C13/004 ,  G11C11/5614 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/0011 ,  G11C13/0069 ,  G11C2213/51 ,  G11C2213/71 ,  H01L27/2463 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/1266 ,  H01L45/146

Abstract: A resistive memory and a method for controlling operations of the resistive memory are provided. The resistive memory has a first memory layer, a second memory layer and a medium layer. Each of the first memory layer and the second memory layer is used to store data. The medium layer is formed between the first memory layer and the second memory layer. The method comprises at least a step of measuring a resistance between the first memory layer and the second memory layer, and determining which one of a first state, a second state and a third state is a state of the resistive memory according to the measured resistance. A resistive memory array including an array of the above resistive memory units, word lines and bit lines is also described, wherein the word (bit) lines are coupled to the first (second) memory layers.

Abstract translation: 提供了一种用于控制电阻性存储器的操作的电阻性存储器和方法。 电阻性存储器具有第一存储器层，第二存储器层和介质层。 第一存储器层和第二存储器层中的每一个用于存储数据。 介质层形成在第一存储层和第二存储层之间。 该方法至少包括测量第一存储层和第二存储层之间的电阻的步骤，以及根据测得的电阻确定第一状态，第二状态和第三状态中的哪一种是电阻性存储器的状态 。 还描述了包括上述电阻性存储器单元，字线和位线的阵列的电阻式存储器阵列，其中字（位）线耦合到第一（第二）存储器层。

公开(公告)号：US20140203237A1

公开(公告)日：2014-07-24

申请号：US13928543

申请日：2013-06-27

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Wei-Chih Chien ,  Dai-Ying Lee ,  Erh-Kun Lai ,  Ming-Hsiu Lee

IPC: H01L45/00

CPC classification number: H01L29/66969 ,  E04H17/16 ,  H01L27/249 ,  H01L29/8615 ,  H01L45/08 ,  H01L45/085 ,  H01L45/12 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/1266 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1633

Abstract: A self-rectified device is provided, comprising a bottom electrode, a patterned dielectric layer with a contact hole formed on the bottom electrode, a memory formed at the bottom electrode and substantially aligned with the contact hole, and a top electrode formed on the bottom electrode and filling into the contact hole to contact with the memory, wherein the top electrode comprises a N+ type semiconductor material or a P+ type semiconductor material, and the memory and the top electrode produce a self-rectified property.

Abstract translation: 提供一种自整流装置，包括底部电极，形成在底部电极上的接触孔的图案化电介质层，形成在底部电极处并基本上与接触孔对准的存储器，以及形成在底部电极上的顶部电极 电极并填充到接触孔中以与存储器接触，其中顶部电极包括N +型半导体材料或P +型半导体材料，并且存储器和顶部电极产生自整流性能。

公开(公告)号：US20130341583A1

公开(公告)日：2013-12-26

申请号：US13849422

申请日：2013-03-22

Applicant: MACRONIX INTERNATIONAL CO., LTD.

Inventor： Ming-Hsiu Lee ,  Wei-Chih Chien

IPC: H01L45/00

CPC classification number: H01L45/1253 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/126 ,  H01L45/144 ,  H01L45/146 ,  H01L45/16 ,  H01L45/1683

Abstract: A resistive memory and a fabricating method thereof are provided. The resistive memory includes first and second electrodes, a variable resistance material layer, a first dielectric layer, and a second dielectric layer. The first electrode includes a first portion and a second portion. The second electrode is disposed opposite to the first electrode. The variable resistance material layer includes a sidewall and first and second surfaces opposite to each other, wherein the first surface is connected with the first portion of the first electrode and the second surface is electrically connected with the second electrode. The second portion surrounds the sidewall of the variable resistance material layer and is connected with the first portion. The first dielectric layer is disposed between the first and the second electrodes. The second dielectric layer is disposed between the variable resistance material layer and the second portion of the first electrode.

Abstract translation: 提供了一种电阻式存储器及其制造方法。 电阻存储器包括第一和第二电极，可变电阻材料层，第一介电层和第二电介质层。 第一电极包括第一部分和第二部分。 第二电极与第一电极相对设置。 可变电阻材料层包括侧壁和彼此相对的第一和第二表面，其中第一表面与第一电极的第一部分连接，第二表面与第二电极电连接。 第二部分围绕可变电阻材料层的侧壁并与第一部分连接。 第一电介质层设置在第一和第二电极之间。 第二电介质层设置在可变电阻材料层和第一电极的第二部分之间。