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26 条记录 (耗时 0.033 秒)

    Timing adjustment circuit, solid-state image pickup element, and camera system
    21.
    发明申请
    Timing adjustment circuit, solid-state image pickup element, and camera system 有权
    定时调整电路，固态摄像元件和相机系统

    公开(公告)号：US20110102656A1

    公开(公告)日：2011-05-05

    申请号：US12929246

    申请日：2011-01-11

    申请人： Masahiro Hatano ,  Masaru Kikuchi

    发明人： Masahiro Hatano ,  Masaru Kikuchi

    IPC分类号： H04N5/335 ,  H01L27/148

    CPC分类号： H01L27/14609 ,  H03L7/0805 ,  H03L7/0995 ,  H03L7/183 ,  H04L7/0012 ,  H04L7/0041 ,  H04N5/225

    摘要： A timing adjustment circuit includes at least one data line; a phase synchronization circuit that includes a plurality of oscillation delay elements which oscillate an oscillation signal, and that is configured to oscillate the oscillation signal by synchronizing a phase of a feedback clock with a phase of a reference clock; at least one delay circuit that includes a delay element which is disposed on the data line and which is equivalent to one of the plurality of oscillation delay elements, and that is configured to delay data which is to be transmitted on the data line; and a delay adjustment unit configured to adjust an amount of delay of the delay element of the delay circuit in accordance with a signal associated with oscillation of the phase synchronization circuit.

    摘要翻译： 定时调整电路包括至少一条数据线; 相位同步电路，其包括振荡振荡信号的多个振荡延迟元件，并且被配置为通过使反馈时钟的相位与参考时钟的相位同步来振荡所述振荡信号; 至少一个延迟电路，其包括设置在所述数据线上并且等效于所述多个振荡延迟元件中的一个的延迟元件，并且被配置为延迟将在所述数据线上发送的数据; 以及延迟调整单元，被配置为根据与相位同步电路的振荡相关联的信号来调整延迟电路的延迟元件的量。

    SOLID-STATE IMAGING DEVICE, IMAGING DEVICE, ELECTRONIC EQUIPMENT, A/D CONVERTER AND A/D CONVERSION METHOD
    22.
    发明申请
    SOLID-STATE IMAGING DEVICE, IMAGING DEVICE, ELECTRONIC EQUIPMENT, A/D CONVERTER AND A/D CONVERSION METHOD 有权
    固态成像装置，成像装置，电子设备，A / D转换器和A / D转换方法

    公开(公告)号：US20110074994A1

    公开(公告)日：2011-03-31

    申请号：US12994035

    申请日：2009-06-04

    申请人： Hayato Wakabayashi ,  Masaru Kikuchi ,  Hiroshi Iwasa ,  Yuuki Yamagata

    发明人： Hayato Wakabayashi ,  Masaru Kikuchi ,  Hiroshi Iwasa ,  Yuuki Yamagata

    IPC分类号： H04N5/335 ,  H03M1/12

    CPC分类号： H04N5/357 ,  H03M1/0658 ,  H03M1/08 ,  H03M1/1023 ,  H03M1/1205 ,  H03M1/123 ,  H03M1/129 ,  H03M1/34 ,  H03M1/56 ,  H03M1/745 ,  H04N5/335 ,  H04N5/37455 ,  H04N5/378

    摘要： In a reference signal comparison AD conversion scheme, a reference signal SLP_ADC and each of P and D phases of a pixel signal voltage Vx are compared. A count clock CKcnt1 is counted based on the comparison result. The counting result data is converted into signal data Dsig, i.e., the difference between the P and D phases, which is also subjected to CDS. At this time, the n-bit AD conversion is performed on each of the P and D phases of the pixel signal voltage Vx, followed by summation for digital integration. This prevents any possible detrimental effects that may be caused by summation in the analog domain. Although the signal data becomes W times greater, noise will likely become √W times greater. This alleviates the problem of random noise resulting from AD conversion such as quantizing noise and circuit noise that do not exist in the analog domain, thus reducing the noise.

    摘要翻译： 在参考信号比较AD转换方案中，比较参考信号SLP_ADC和像素信号电压Vx的P和D相位中的每一个。 基于比较结果对计数时钟CKcnt1进行计数。 计数结果数据被转换为信号数据Dsig，也就是也经历CDS的P相和D相之间的差。 此时，对像素信号电压Vx的P相和D相进行n位AD转换，然后进行数字积分的求和。 这可以防止可能由模拟域中的相加引起的任何可能的有害影响。 虽然信号数据变为W倍，噪声可能会增加到更多的√W倍。 这减轻了AD转换产生的随机噪声的问题，例如量化噪声和模拟域中不存在的电路噪声，从而降低噪声。

    Timing adjustment circuit, solid-state image pickup element, and camera system
    24.
    发明申请
    Timing adjustment circuit, solid-state image pickup element, and camera system 有权
    定时调整电路，固态摄像元件和相机系统

    公开(公告)号：US20100127741A1

    公开(公告)日：2010-05-27

    申请号：US12591132

    申请日：2009-11-10

    申请人： Masahiro Hatano ,  Masaru Kikuchi

    发明人： Masahiro Hatano ,  Masaru Kikuchi

    IPC分类号： H03L7/00

    CPC分类号： H01L27/14609 ,  H03L7/0805 ,  H03L7/0995 ,  H03L7/183 ,  H04L7/0012 ,  H04L7/0041 ,  H04N5/225

    摘要： A timing adjustment circuit includes at least one data line; a phase synchronization circuit that includes a plurality of oscillation delay elements which oscillate an oscillation signal, and that is configured to oscillate the oscillation signal by synchronizing a phase of a feedback clock with a phase of a reference clock; at least one delay circuit that includes a delay element which is disposed on the data line and which is equivalent to one of the plurality of oscillation delay elements, and that is configured to delay data which is to be transmitted on the data line; and a delay adjustment unit configured to adjust an amount of delay of the delay element of the delay circuit in accordance with a signal associated with oscillation of the phase synchronization circuit.

    摘要翻译： 定时调整电路包括至少一条数据线; 相位同步电路，其包括振荡振荡信号的多个振荡延迟元件，并且被配置为通过使反馈时钟的相位与参考时钟的相位同步来振荡所述振荡信号; 至少一个延迟电路，其包括设置在所述数据线上并且等效于所述多个振荡延迟元件中的一个的延迟元件，并且被配置为延迟将在所述数据线上发送的数据; 以及延迟调整单元，被配置为根据与相位同步电路的振荡相关联的信号来调整延迟电路的延迟元件的量。