公开(公告)号：US11349443B2

公开(公告)日：2022-05-31

申请号：US16921922

申请日：2020-07-06

Applicant: MEDIATEK INC.

Inventor： Yu-Hung Lin ,  Kuan-Ta Chen

IPC: H03F3/45

Abstract: An operational amplifier includes a single-stage amplifier and a current controller. The single-stage amplifier receives an input signal, and amplifies the input signal to generate an output signal, wherein the single-stage amplifier includes a voltage controlled current source circuit that operates in response to a bias voltage input. The current controller receives the input signal, and generates the bias voltage input according to the input signal.

公开(公告)号：US10763884B2

公开(公告)日：2020-09-01

申请号：US16515056

申请日：2019-07-18

Applicant: MEDIATEK INC.

Inventor： Chuan-Hung Hsiao ,  Sung-Han Wen ,  Kuan-Ta Chen

IPC: H03M1/68 ,  H03M1/06 ,  H03M7/36

Abstract: A digital-to-analog conversion circuit is used for converting a first digital input into a first analog output, and includes a segmentation circuit, a plurality of multi-bit dynamic element matching digital-to-analog converters (DEM DACs), and a combination circuit. The segmentation circuit applies segmentation to the first digital input to generate a plurality of code segments. The multi-bit DEM DACs convert the code segments into a plurality of DAC outputs, respectively, wherein the multi-bit DEM DACs include at least a first multi-bit DEM DAC and a second multi-bit DEM DAC, and the first multi-bit DEM DAC and the second multi-bit DEM DAC employ different DEM techniques. The combination circuit combines the DAC outputs to generate the first analog output.

公开(公告)号：US20200028519A1

公开(公告)日：2020-01-23

申请号：US16515056

申请日：2019-07-18

Applicant: MEDIATEK INC.

Inventor： Chuan-Hung Hsiao ,  Sung-Han Wen ,  Kuan-Ta Chen

IPC: H03M1/68

Abstract: A digital-to-analog conversion circuit is used for converting a first digital input into a first analog output, and includes a segmentation circuit, a plurality of multi-bit dynamic element matching digital-to-analog converters (DEM DACs), and a combination circuit. The segmentation circuit applies segmentation to the first digital input to generate a plurality of code segments. The multi-bit DEM DACs convert the code segments into a plurality of DAC outputs, respectively, wherein the multi-bit DEM DACs include at least a first multi-bit DEM DAC and a second multi-bit DEM DAC, and the first multi-bit DEM DAC and the second multi-bit DEM DAC employ different DEM techniques. The combination circuit combines the DAC outputs to generate the first analog output.

公开(公告)号：US10510823B2

公开(公告)日：2019-12-17

申请号：US15693548

申请日：2017-09-01

Applicant: MEDIATEK INC.

Inventor： Sung-Han Wen ,  Kuan-Ta Chen

IPC: H01L49/02 ,  H01L29/06 ,  H01L27/08 ,  H03F1/32 ,  H03F3/45

Abstract: An impedance circuit includes a poly-resistor and a controller. The poly-resistor has a first terminal and a second terminal. The controller generates a first control voltage and a second control voltage. The resistance between the first terminal and the second terminal of the poly-resistor is determined according to the first control voltage and the second control voltage. The second control voltage is different from the first control voltage. The proposed impedance circuit can improve the linearity of the poly-resistor.

公开(公告)号：US10063251B2

公开(公告)日：2018-08-28

申请号：US15630942

申请日：2017-06-22

Applicant: MEDIATEK INC.

Inventor： Chuan-Hung Hsiao ,  Kuan-Ta Chen

IPC: H03M1/00 ,  H03M1/74 ,  H03F3/217 ,  H03F3/30

CPC classification number: H03M1/742 ,  H03F3/2171 ,  H03F3/2173 ,  H03F3/3035 ,  H03F3/304 ,  H03F2203/45238 ,  H03M1/001

Abstract: A circuit applied to speaker includes a tri-level current DAC and a class D amplifier. The current DAC is arranged to receive a digital signal to generate a current signal, and the class D amplifier is arranged to directly receive the current from the current DAC and to amplify the current signal to generate an output signal. SNR performance is well improved class D amplifier due to small signal noise reduced by preceding tri-level DAC. In addition, the circuit further includes a driving stage, and a gate-drain voltage of a power transistor within the driving stage can be controlled to set the appropriate slew rate.

公开(公告)号：US09998815B2

公开(公告)日：2018-06-12

申请号：US14878215

申请日：2015-10-08

Applicant: MediaTek Inc.

Inventor： Jing-Yi Huang ,  Kuan-Ta Chen ,  Chih-Ping Lin

IPC: H04R1/10 ,  H04R29/00

CPC classification number: H04R1/1041 ,  H04R1/1033 ,  H04R29/001 ,  H04R2460/03 ,  H04R2460/15 ,  H04R2499/11

Abstract: A portable device and a method for entering a power-saving mode are provided. An audio signal is transmitted to an earphone via a cable. At least one electrical characteristic on the cable is sensed to generate at least one sensing signal. The at least one sensing signal is sampled to generate at least one data signal. Whether the earphone is in listening position is determined according to the at least one data signal. When it is determined that the earphone is not in listening position, the portable device enters a power-saving mode.