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    System and method for reducing phase distortion in a linear transmitter
    22.
    发明授权
    System and method for reducing phase distortion in a linear transmitter 有权
    用于减少线性发射机相位失真的系统和方法

    公开(公告)号：US07616931B2

    公开(公告)日：2009-11-10

    申请号：US10986141

    申请日：2004-11-12

    Applicant: Meng-An Pan

    Inventor： Meng-An Pan

    IPC: H04B1/04

    CPC classification number: H03F3/189 ,  H03F1/32

    Abstract: The invention decreases phase distortion in a transmitter by balancing C load in the power amplifier input such that a PGA won't have phase distortion.

    Abstract translation: 本发明通过平衡功率放大器输入中的C负载来减小发射机中的相位失真，使得PGA将不具有相位失真。

    METHOD AND SYSTEM FOR AN LC RESONANCE CURRENT GAIN BOOSTING AMPLIFIER
    26.
    发明申请
    METHOD AND SYSTEM FOR AN LC RESONANCE CURRENT GAIN BOOSTING AMPLIFIER 有权
    LC谐振电流增益放大器的方法和系统

    公开(公告)号：US20080136463A1

    公开(公告)日：2008-06-12

    申请号：US11619803

    申请日：2007-01-04

    Applicant: Yuyu Chang ,  Meng-An Pan

    Inventor： Yuyu Chang ,  Meng-An Pan

    IPC: H02M11/00 ,  H03G3/30

    CPC classification number: H03F3/195 ,  H03F1/08 ,  H03F3/191 ,  H03F3/45475 ,  H03F2200/168 ,  H03F2200/451 ,  H03F2200/91 ,  H03F2203/45136

    Abstract: Aspects of a method and system for an integrated LC resonant current gain boosting amplifier may include amplifying within a chip, via an on-chip LC current gain circuit, an alternating current (AC) generated by an on-chip voltage-to-current converter, and converting within the chip, via an on-chip current-to-voltage circuit; the amplified alternating current to an output voltage. The on-chip LC current gain circuit comprises only passive components, which may include one or more resistors, one or more capacitors, and one or more inductors.

    Abstract translation: 用于集成LC谐振电流增益升压放大器的方法和系统的方面可以包括通过片上LC电流增益电路在芯片内放大由片上电压 - 电流转换器产生的交流（AC） ，并通过片上电流 - 电压电路在芯片内转换; 放大的交流电流达到输出电压。 片上LC电流增益电路仅包括无源部件，其可以包括一个或多个电阻器，一个或多个电容器和一个或多个电感器。

    METHOD AND SYSTEM FOR WIDE RANGE AMPLITUDE DETECTION
    27.
    发明申请
    METHOD AND SYSTEM FOR WIDE RANGE AMPLITUDE DETECTION 失效
    用于宽范围振幅检测的方法和系统

    公开(公告)号：US20080136458A1

    公开(公告)日：2008-06-12

    申请号：US11690250

    申请日：2007-03-23

    Applicant: Meng-An Pan

    Inventor： Meng-An Pan

    IPC: H03K5/00

    CPC classification number: H03F3/45179 ,  G01R19/04 ,  H03F2200/78 ,  H03F2203/45522 ,  H03F2203/45591 ,  H03F2203/45686 ,  H03G3/30 ,  H03G7/00

    Abstract: Aspects of a method and system for wide range amplitude detection are provided. In this regard, many electronic systems may require amplitude detection of a variety of signals with widely varying amplitudes. Aspects of the invention may comprise suitable logic, circuitry, and/or code to perform amplitude detection and may be easily configured to accommodate a wide range of amplitudes. In this regard, the configuration of the amplitude detector may be performed via simple design changes and/or may be dynamically configured by suitable logic, circuitry, and/or code. Accordingly, multiplexing a single instance of the wide range amplitude detector and/or multiplexing multiple instances of the wide range amplitude detector may result in reduced design time, reduced circuit size, and/or reduced cost.

    Abstract translation: 提供了用于宽范围幅度检测的方法和系统的方面。 在这方面，许多电子系统可能需要对具有广泛变化幅度的各种信号进行幅度检测。 本发明的方面可以包括用于执行振幅检测的合适的逻辑，电路和/或代码，并且可以容易地配置为适应宽范围的幅度。 在这方面，幅度检测器的配置可以通过简单的设计改变来执行和/或可以由合适的逻辑，电路和/或代码来动态配置。 因此，对宽范围幅度检测器的单个实例进行多路复用和/或复用多范围幅度检测器的多个实例可以导致缩短的设计时间，减小的电路尺寸和/或降低的成本。

    Method and system for a polyphase clock for a second intermediate frequency (IF) mixer to improve signal quality
    28.
    发明授权
    Method and system for a polyphase clock for a second intermediate frequency (IF) mixer to improve signal quality 有权
    用于第二中频（IF）混频器的多相时钟的方法和系统，以改善信号质量

    公开(公告)号：US07327198B2

    公开(公告)日：2008-02-05

    申请号：US10977872

    申请日：2004-10-29

    Applicant: Meng-An Pan

    Inventor： Meng-An Pan

    IPC: H03B21/02 ,  H04B1/26 ,  H04B1/28

    CPC classification number: H04B15/06

    Abstract: Methods and systems for reducing interference in a signal are disclosed herein. Aspects of the method may comprise generating a first local oscillator signal. The generated first local oscillator signal may be phase-shifted to generate a second local oscillator signal and the second local oscillator signal may be phase-shifted to generate a third local oscillator signal. The first, second, and third local oscillator signals may be combined to generate a combined local oscillator signal, where a third harmonic and/or a fifth harmonic may be eliminated from the combined local oscillator signal. The generated second local oscillator signal may be multiplied by a factor of square root of two (√{square root over (2)}). The first and third local oscillator signals may be added to the multiplied second local oscillator signal. An input signal may be mixed with the generated combined local oscillator signal to generate a mixed output signal.

    Abstract translation: 本文公开了用于减少信号中的干扰的方法和系统。 该方法的方面可以包括产生第一本地振荡器信号。 产生的第一本地振荡器信号可以被相移以产生第二本地振荡器信号，并且第二本地振荡器信号可以被相移以产生第三本地振荡器信号。 第一，第二和第三本地振荡器信号可以被组合以产生组合的本地振荡器信号，其中可以从组合的本地振荡器信号中消除三次谐波和/或第五谐波。 所产生的第二本地振荡器信号可以乘以二（2）的平方根的因子，第一和第三本地振荡器信号可以被加到相乘的第二本机振荡器信号，输入信号可以是 与产生的组合本地振荡器信号混合以产生混合输出信号。

    Method and apparatus for fractional-N synthesis
    29.
    发明授权
    Method and apparatus for fractional-N synthesis 有权
    分数N合成方法和装置

    公开(公告)号：US07231196B2

    公开(公告)日：2007-06-12

    申请号：US10015993

    申请日：2001-12-12

    Applicant: Hung-Ming Chien ,  Meng-An Pan ,  Stephen Wu ,  Brima Ibrahim

    Inventor： Hung-Ming Chien ,  Meng-An Pan ,  Stephen Wu ,  Brima Ibrahim

    IPC: H04B7/00 ,  H04B1/18

    CPC classification number: H03L7/1978 ,  H03L7/0891

    Abstract: A method and apparatus for fractional-N synthesis includes processing that begins by generating a 1st feedback frequency from the output frequency based on a fixed divider value. The processing continues by generating a 2nd feedback frequency from the output frequency based on a selectable divider value, a modified fractional value of the divider value, and a modified integer value of the divider value. The processing continues by determining whether the fractional value of the divider value is within a range of fractional values. If so, the 1st feedback frequency is used to produce the output. If the fractional portion of the divider value is not within the range of fractional values, the 2nd feedback frequency is used to produce the output frequency.

    Abstract translation: 用于分数N合成的方法和装置包括通过基于固定分频值从输出频率产生1 反馈频率而开始的处理。 该处理继续，基于可选择的分频值，分频值的修正分数值和分频值的修正整数值，从输出频率产生二极点反馈频率。 通过确定分频值的分数值是否在分数值的范围内，继续处理。 如果是这样，则使用第一反馈频率来产生输出。 如果分频值的小数部分不在分数值的范围内，则使用反馈频率为2的反馈频率来产生输出频率。

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