MEMORY CELL PROTECTIVE LAYERS IN A THREE-DIMENSIONAL MEMORY ARRAY

    公开(公告)号:US20240188308A1

    公开(公告)日:2024-06-06

    申请号:US18520377

    申请日:2023-11-27

    Inventor: Farrell M. Good

    CPC classification number: H10B63/845

    Abstract: Methods, systems, and devices for memory cell protective layers in a three-dimensional memory array are described. A memory device may support accessing memory cells of a memory array arranged in a three-dimensional architecture. The three-dimensional architecture may include levels of memory cells separated by levels of dielectric materials, such that the memory cells are formed between the dielectric materials. To prevent or reduce diffusion between a given memory cell and the dielectric materials, a barrier material may be formed on the dielectric material before forming the memory cell. The barrier material may be located between the memory cell and dielectric material, which may reduce or prevent material diffusion.

    Methods of forming a microelectronic device, and related systems and additional methods

    公开(公告)号:US11551926B2

    公开(公告)日:2023-01-10

    申请号:US17248376

    申请日:2021-01-22

    Abstract: A method of forming a microelectronic device comprises treating a base structure with a first precursor to adsorb the first precursor to a surface of the base structure and form a first material. The first precursor comprises a hydrazine-based compound including Si—N—Si bonds. The first material is treated with a second precursor to covert the first material into a second material. The second precursor comprises a Si-centered radical. The second material is treaded with a third precursor to covert the second material into a third material comprising Si and N. The third precursor comprises an N-centered radical. An ALD system and a method of forming a seal material through ALD are also described.

    Electronic devices comprising silicon carbide materials

    公开(公告)号:US11424118B2

    公开(公告)日:2022-08-23

    申请号:US16751049

    申请日:2020-01-23

    Abstract: An electronic device comprising a stack structure comprising one or more stacks of materials and one or more silicon carbide materials adjacent to the one or more stacks of materials. The materials of the one or more stacks comprise a single chalcogenide material and one or more of a conductive carbon material, a conductive material, and a hardmask material. The one or more silicon carbide materials comprises silicon carbide, silicon carboxide, silicon carbonitride, silicon carboxynitride, and also comprise silicon-carbon covalent bonds. The one or more silicon carbide materials is configured as a liner or as a seal. Additional electronic devices are disclosed, as are related systems and methods of forming an electronic device.

    SEMICONDUCTOR STRUCTURE FORMATION
    27.
    发明申请

    公开(公告)号:US20210202246A1

    公开(公告)日:2021-07-01

    申请号:US16729903

    申请日:2019-12-30

    Abstract: Systems, apparatuses, and methods related to semiconductor structure formation are described. An example apparatus includes a structural material for a semiconductor device. The structural material includes an orthosilicate derived oligomer having a number of oxygen (O) atoms each chemically bonded to one of a corresponding number of silicon (Si) atoms and a chemical bond formed between an element from group 13 of a periodic table of elements (e.g., B, Al, Ga, In, and Tl) and the number of O atoms of the orthosilicate derived oligomer. The chemical bond crosslinks chains of the orthosilicate derived oligomer to increase mechanical strength of the structural material, relative to the structural material formed without the chemical bond to crosslink the chains, among other benefits described herein.

    DEVICES INCLUDING MULTI-PORTION LINERS
    28.
    发明申请

    公开(公告)号:US20200274059A1

    公开(公告)日:2020-08-27

    申请号:US16870108

    申请日:2020-05-08

    Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

    Semiconductor structures including multi-portion liners

    公开(公告)号:US10658580B2

    公开(公告)日:2020-05-19

    申请号:US15857873

    申请日:2017-12-29

    Abstract: A method of forming a semiconductor structure. The method comprises forming a protective portion of a liner on at least a portion of stack structures on a substrate. The protective portion comprises a material formulated to adhere to the stack structures. A conformal portion of the liner is formed on the protective portion of the liner or on the protective portion of the liner and exposed materials of the stack structures. At least one of the protective portion and the conformal portion does not comprise aluminum. Additional methods of forming a semiconductor structure are disclosed, as are semiconductor structures including the liners comprising the protective portion and the conformal portion.

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