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    READ VERIFICATION CADENCE AND TIMING IN MEMORY DEVICES
    21.
    发明公开
    READ VERIFICATION CADENCE AND TIMING IN MEMORY DEVICES 审中-公开

    公开(公告)号：US20240062840A1

    公开(公告)日：2024-02-22

    申请号：US17889214

    申请日：2022-08-16

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Michael Winterfeld ,  Byron D. Harris ,  Tom Geukens ,  Juane Li ,  Fangfang Zhu

    IPC: G11C16/34 ,  G11C11/56 ,  G11C16/10

    CPC classification number: G11C16/3459 ,  G11C11/5628 ,  G11C11/5671 ,  G11C16/10

    Abstract: A processing device in a memory sub-system performs a first pass of a multi-pass programming operation to coarsely program a first wordline, performs a second pass to coarsely program a second wordline adjacent to the first wordline, performs a third pass of a multi-pass programming operation to finely program the first wordline, performs a fourth pass of a multi-pass programming operation to coarsely program a third wordline adjacent to the second wordline, performs a fifth pass of a multi-pass programming operation to finely program the second wordline, and responsive to determining that at least the second wordline has been finely programmed, performs a read verify operation on one or more cells associated with the first wordline.

    Read-modify-write data consistency management
    22.
    发明授权
    Read-modify-write data consistency management 有权

    公开(公告)号：US11709631B2

    公开(公告)日：2023-07-25

    申请号：US17460972

    申请日：2021-08-30

    Applicant: Micron Technology, Inc.

    Inventor： Fangfang Zhu ,  Jiangli Zhu ,  Juane Li

    IPC: G06F3/06

    CPC classification number: G06F3/0659 ,  G06F3/064 ,  G06F3/0619 ,  G06F3/0679

    Abstract: A system includes a processing device, operatively coupled with a memory device, to perform operations including receiving a media access operation command designating a first memory location, and determining whether a first media access operation command designating the first memory location and a second media access operation designating a second memory location are synchronized, after determining that the first and second media access operation commands are not synchronized, determining that the media access operation command is an error flow recovery (ERF) read command, in response to determining that the media access operation command is an ERF read command, determining whether a head command of the first queue is blocked from execution, and in response to determining that the head command is unblocked from execution, servicing the ERF read command from a media buffer maintaining previously written ERF data.

    Tracking host-provided metadata in a memory sub-system
    24.
    发明授权
    Tracking host-provided metadata in a memory sub-system 有权

    公开(公告)号：US11636008B2

    公开(公告)日：2023-04-25

    申请号：US17464449

    申请日：2021-09-01

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Seungjune Jeon ,  Juane Li ,  Ning Chen

    IPC: G06F11/00 ,  G06F11/10

    Abstract: A request to program host data to a memory device of a memory sub-system is received. Redundancy metadata associated with the host data is generated. A determination is made, in view of the received request, whether the host data is valid data or invalid data. In response to a determination that the host data is invalid data, updated redundancy metadata associated with the host data is generated. The updated redundancy metadata indicates that the host data is invalid data. The host data and the updated redundancy metadata is programmed to the memory device.

    TRACKING HOST-PROVIDED METADATA IN A MEMORY SUB-SYSTEM
    25.
    发明申请
    TRACKING HOST-PROVIDED METADATA IN A MEMORY SUB-SYSTEM 有权

    公开(公告)号：US20230067738A1

    公开(公告)日：2023-03-02

    申请号：US17464449

    申请日：2021-09-01

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Seungjune Jeon ,  Juane Li ,  Ning Chen

    IPC: G06F11/10

    Abstract: A request to program host data to a memory device of a memory sub-system is received. Redundancy metadata associated with the host data is generated. A determination is made, in view of the received request, whether the host data is valid data or invalid data. In response to a determination that the host data is invalid data, updated redundancy metadata associated with the host data is generated. The updated redundancy metadata indicates that the host data is invalid data. The host data and the updated redundancy metadata is programmed to the memory device.

    GENERATING ERROR CHECKING DATA FOR ERROR DETECTION DURING MODIFICATION OF DATA IN A MEMORY SUB-SYSTEM
    26.
    发明申请
    GENERATING ERROR CHECKING DATA FOR ERROR DETECTION DURING MODIFICATION OF DATA IN A MEMORY SUB-SYSTEM 有权

    公开(公告)号：US20210342220A1

    公开(公告)日：2021-11-04

    申请号：US17379886

    申请日：2021-07-19

    Applicant: Micron Technology, Inc.

    Inventor： Ning Chen ,  Juane Li ,  Fangfang Zhu

    IPC: G06F11/10 ,  G06F3/06

    Abstract: First and second data are identified, such that the second data is based on a modification operation performed on the first data. First error-checking data comprising a Cyclic Redundancy Check (CRC) value of the first data is identified. Incremental error-checking data is generated based on a difference between the first data and the second data. Updated first error-checking data is generated based on a combination of the first error-checking data and the incremental error-checking data. The updated first error-checking data is compared to second error-checking data generated from a CRC value of the second data to determine whether the second data contains an error.

    CONCURRENT COMMAND LIMITER FOR A MEMORY SYSTEM
    29.
    发明公开
    CONCURRENT COMMAND LIMITER FOR A MEMORY SYSTEM 审中-公开

    公开(公告)号：US20240126480A1

    公开(公告)日：2024-04-18

    申请号：US18531329

    申请日：2023-12-06

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Jason Duong ,  Fangfang Zhu ,  Jiangli Zhu ,  Juane Li ,  Chih-Kuo Kao

    IPC: G06F3/06

    CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/0679

    Abstract: A system can include a memory device and a processing device coupled with the memory device. The processing device can receive, from a host system, a command of a type; determine a weighted count of the command according to the type of the command; track, based on the weighted count, a first count of commands of the type; determine whether the first count of commands of the type satisfies a threshold criterion for commands of the type; and responsive to determining that the first count of commands of the type satisfies the threshold criterion, transmit a notification to the host system to refrain from transmitting commands of the type.

    EFFICIENT PERIODIC BACKEND REFRESH READS FOR REDUCING BIT ERROR RATE IN MEMORY DEVICES
    30.
    发明公开
    EFFICIENT PERIODIC BACKEND REFRESH READS FOR REDUCING BIT ERROR RATE IN MEMORY DEVICES 审中-公开

    公开(公告)号：US20240071462A1

    公开(公告)日：2024-02-29

    申请号：US18227139

    申请日：2023-07-27

    Applicant: Micron Technology, Inc.

    Inventor： Tingjun Xie ,  Yang Liu ,  Juane Li ,  Aaron Lee ,  Jiangli Zhu

    IPC: G11C11/406 ,  G11C11/4096

    CPC classification number: G11C11/40626 ,  G11C11/40615 ,  G11C11/4096

    Abstract: A processing device in a memory sub-system traverses a plurality of management units of a memory device at a defined scan/read refresh frequency. For every management unit of the plurality of management units, the processing device identifies a page satisfying a lowest sensing overhead criterion, and senses data of the identified page without transferring the data out of the memory device. A non-transitory computer readable medium includes program instructions that when executed by a processing device, cause the processing device to perform operations of traversing a plurality of management units of a memory device at a defined scan/read refresh frequency. For every management unit, the processing device identifies a page satisfying a lowest sensing overhead criterion, and senses data of the identified page without transferring the data out of the memory device.

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