公开(公告)号：US11810928B2

公开(公告)日：2023-11-07

申请号：US17322536

申请日：2021-05-17

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Duli Mao ,  Bill Phan ,  Seong Yeol Mun ,  Yuanliang Liu ,  Alireza Bonakdar ,  Chengming Liu ,  Zhiqiang Lin

IPC: H01L27/146

CPC classification number: H01L27/14605 ,  H01L27/1465 ,  H01L27/14621 ,  H01L27/14623 ,  H01L27/14625 ,  H01L27/14627 ,  H01L27/14685

Abstract: CMOS image sensor with LED flickering reduction and low color cross-talk are disclosed. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array that is disposed in a semiconductor substrate. Each pixel includes a plurality of large subpixels (LPDs) and at least one small subpixel (SPD). A plurality of color filters are disposed over individual subpixels. Each individual SPD is laterally adjacent to at least one other SPD.

公开(公告)号：US11616088B2

公开(公告)日：2023-03-28

申请号：US16830086

申请日：2020-03-25

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Sing-Chung Hu ,  Seong Yeol Mun ,  Bill Phan

IPC: H01L27/146 ,  H01L29/66 ,  H01L21/762 ,  H01L29/423 ,  H01L29/78

Abstract: Image sensors include a photodiode disposed in a semiconductor substrate and a transistor operatively coupled to the photodiode. The transistor includes a nonplanar structure disposed in the semiconductor substrate, which is bounded by two outer trench structures formed in the semiconductor substrate. Isolation deposits are disposed within the two outer trench structures formed in the semiconductor substrate. A gate includes a planar gate and two fingers extending into one of two inner trench structures formed in the semiconductor substrate between the nonplanar structure and a respective one of the two outer trench structures. This structure creates an electron channel extending along a plurality of sidewall portions of the nonplanar structure in a channel width plane.

公开(公告)号：US20230067975A1

公开(公告)日：2023-03-02

申请号：US17463222

申请日：2021-08-31

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Seong Yeol Mun

IPC: H01L27/146

Abstract: An image sensor comprises a first photodiode, a second photodiode, and a deep trench isolation structure. The first photodiode and the second photodiode are each disposed within a semiconductor substrate. The first photodiode is adjacent to the second photodiode. The deep trench isolation structure has a varying depth disposed within the semiconductor substrate between the first photodiode and the second photodiode. The DTI structure extends the varying depth from a first side of the semiconductor substrate towards a second side of the semiconductor substrate. The first side of the semiconductor substrate is opposite of the second side of the semiconductor substrate.

公开(公告)号：US11557620B2

公开(公告)日：2023-01-17

申请号：US17217937

申请日：2021-03-30

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Seong Yeol Mun ,  Yibo Zhu ,  Keiji Mabuchi

IPC: H01L27/146

Abstract: A high k passivation layer, an anti-reflective coating layer, and a buffer layer are disposed over semiconductor substrate including photodiodes formed therein. Trenches are etched into the semiconductor substrate through the buffer layer, anti-reflective coating layer, and the high k passivation layer in a grid-like pattern surrounding each of the photodiodes in the semiconductor substrate. Another high k passivation layer lines an interior of the trenches in the semiconductor substrate. An adhesive and barrier layer is deposited over the high k passivation layer that lines the interior of the trenches. A deep trench isolation (DTI) structure is formed with conductive material deposited into the trenches over the adhesive and barrier layer to fill the trenches. A grid structure is formed over the DTI structure and above a plane of the buffer layer. The grid structure is formed with the conductive material.

公开(公告)号：US20220399393A1

公开(公告)日：2022-12-15

申请号：US17343553

申请日：2021-06-09

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Heesoo Kang ,  Bill Phan ,  Seong Yeol Mun

IPC: H01L27/146

Abstract: SiGe photodiode for crosstalk reduction. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array disposed in a semiconductor material. Each pixel includes a plurality of photodiodes. The plurality of pixels are configured to receive an incoming light through an illuminated surface of the semiconductor material. Each pixel includes a first photodiode comprising a silicon (Si) material; and a second photodiode having the Si material and a silicon germanium (SiGe) material.

公开(公告)号：US11348957B2

公开(公告)日：2022-05-31

申请号：US16729163

申请日：2019-12-27

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Seong Yeol Mun ,  Young Woo Jung

IPC: H01L27/146

Abstract: Image sensors include a photodiode formed in a substrate material and a transistor coupled to the photodiode. The transistor has a trench structure formed in the substrate material, an isolation layer disposed on the substrate material, and a gate disposed on the isolation layer and extending into the trench structure. The trench structure has a polygonal cross section in a channel width plane, the polygonal cross section defining at least four sidewall portions of the substrate material, which contribute to an effective channel width measured in the channel width plane that is wider than a planar channel width of the transistor.

公开(公告)号：US11282890B2

公开(公告)日：2022-03-22

申请号：US16748604

申请日：2020-01-21

Applicant: OmniVision Technologies, Inc.

Inventor： Seong Yeol Mun

IPC: H01L27/146

Abstract: A method of fabricating a target shallow trench isolation (STI) structure between devices in a wafer-level image sensor having a large number of pixels includes etching a trench, the trench having a greater depth and width than a target STI structure and epitaxially growing the substrate material in the trench for a length of time necessary to provide the target depth and width of the isolation structure. An STI structure formed in a semiconductor substrate includes a trench etched in the substrate having a depth and width greater than that of the STI structure, and semiconductor material epitaxially grown in the trench to provide a critical dimension and target depth of the STI structure. An image sensor includes a semiconductor substrate, a photodiode region, a pixel transistor region and an STI structure between the photodiode region and the pixel transistor region.

公开(公告)号：US11264419B2

公开(公告)日：2022-03-01

申请号：US16730756

申请日：2019-12-30

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Seong Yeol Mun

IPC: H01L27/146

Abstract: A fully depleted silicon on insulator (FDSOI) is employed to reduce diffusion leakage (e.g., gate induced drain leakage, junction leakage, etc.) associated with the diffusion regions of a pixel cell. The buried oxide (BOX) layer, for example, fully isolates the transistor channel region, such as an (N) channel region of the pixel cell from the photodiode(s) of the pixel region, eliminating the junction leakage path, thus leading to a reduction in diffusion leakage and an increase device operation speed. An increase of full well capacity can also be realized by the absence of isolation structure, such as trench isolation or isolation implant structure.

公开(公告)号：US20220005846A1

公开(公告)日：2022-01-06

申请号：US16946743

申请日：2020-07-02

Applicant: OmniVision Technologies, Inc.

Inventor： Seong Yeol Mun ,  Heesoo Kang

IPC: H01L27/146

Abstract: A pixel cell with an elevated floating diffusion region is formed to reduce diffusion leakage (e.g., gate induced drain leakage, junction leakage, etc.). The floating diffusion region can be elevated by separating a doped floating diffusion region from the semiconductor substrate by disposing an intervening layer (e.g., undoped, lightly doped, etc.) on the semiconductor substrate and beneath the doped floating diffusion region. For instance, the elevated floating diffusion region can be formed by stacked material layers composed of a lightly or undoped base or intervening layer and a heavy doped (e.g., As doped) “elevated” layer. In some examples, the stacked material layers can be formed by first and second epitaxial growth layers.

公开(公告)号：US20210225927A1

公开(公告)日：2021-07-22

申请号：US16748604

申请日：2020-01-21

Applicant: OmniVision Technologies, Inc.

Inventor： Seong Yeol Mun

IPC: H01L27/146

Abstract: A method of fabricating a target shallow trench isolation (STI) structure between devices in a wafer-level image sensor having a large number of pixels includes etching a trench, the trench having a greater depth and width than a target STI structure and epitaxially growing the substrate material in the trench for a length of time necessary to provide the target depth and width of the isolation structure. An STI structure formed in a semiconductor substrate includes a trench etched in the substrate having a depth and width greater than that of the STI structure, and semiconductor material epitaxially grown in the trench to provide a critical dimension and target depth of the STI structure. An image sensor includes a semiconductor substrate, a photodiode region, a pixel transistor region and an STI structure between the photodiode region and the pixel transistor region.