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公开(公告)号：US11670652B2
公开(公告)日：2023-06-06
申请号：US17712873
申请日：2022-04-04
Inventor： Masashi Murakami , Kazuko Nishimura , Yutaka Abe , Yoshiyuki Matsunaga , Yoshihiro Sato , Junji Hirase
IPC: H01L27/146 , H01L51/42
CPC classification number: H01L27/14609 , H01L27/14632 , H01L27/14643 , H01L27/14665 , H01L27/14636 , H01L51/42
Abstract: An imaging device including: a photoelectric converter that converts incident light into a signal charge; a node to which the signal charge is input; a transistor having a source and a drain, one of the source and the drain being connected to the node; and a capacitive element. The capacitive element including a first electrode, a second electrode and a dielectric film sandwiched between the first electrode and the second electrode, the first electrode being connected to the other of the source and the drain of the transistor, the second electrode being connected to a voltage source or a ground. The transistor is configured to switch a first mode and a second mode, a sensitivity in the first mode being different from a sensitivity in the second mode.
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公开(公告)号：US11595599B2
公开(公告)日：2023-02-28
申请号：US17487955
申请日：2021-09-28
Inventor： Yutaka Abe , Kazuko Nishimura , Masashi Murakami
Abstract: An imaging device includes a photoelectric converter that converts light into signal charge, a charge accumulation region that accumulates the signal charge, a first transistor having a gate connected to the charge accumulation region, and a common gate amplifier circuit that amplifies an output of the first transistor to output to the charge accumulation region. The common gate amplifier circuit includes a second transistor. One of a source and a drain of the second transistor is connected to one of a source and a drain of the first transistor, and the other of the source and the drain of the second transistor is connected to the charge accumulation region.
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公开(公告)号：US11165979B2
公开(公告)日：2021-11-02
申请号：US15986363
申请日：2018-05-22
Inventor： Asami Nishikawa , Kazuko Nishimura
Abstract: An imaging device includes: a semiconductor substrate; pixels arranged two-dimensionally along row and column directions on the substrate; and one or more interconnection layers located on the semiconductor substrate, including a first signal line extending along the column direction and a second signal line to which a multi-level signal is applied. A first pixel includes: a photoelectric converter; a charge storage region; a first interconnection electrically connected to the charge storage region; and a first transistor that includes a first diffusion layer electrically connected to the first signal line and a second diffusion layer electrically connected to the second signal line and that outputs a signal to the first signal line. The first and second signal lines and the first interconnection are arranged in a first interconnection layer. The second signal line is located between the first interconnection and the first signal line, viewed perpendicularly to the substrate.
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公开(公告)号：US11159752B2
公开(公告)日：2021-10-26
申请号：US16815257
申请日：2020-03-11
Inventor： Yutaka Abe , Kazuko Nishimura , Masashi Murakami
Abstract: An imaging device includes a photoelectric converter that converts light into signal charge, a charge accumulation region that accumulates the signal charge, a first transistor having a gate connected to the charge accumulation region, and a common gate amplifier circuit that amplifies an output of the first transistor to output to the charge accumulation region. The common gate amplifier circuit includes a second transistor. One of a source and a drain of the second transistor is connected to one of a source and a drain of the first transistor, and the other of the source and the drain of the second transistor is connected to the charge accumulation region.
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公开(公告)号：US10957725B2
公开(公告)日：2021-03-23
申请号：US16907742
申请日：2020-06-22
Inventor： Masashi Murakami , Kazuko Nishimura , Yasuo Miyake , Yasunori Inoue
IPC: H01L27/146 , H01L27/142 , H01L31/14 , H04N5/3745 , H04N5/374 , H04N5/355
Abstract: An imaging device includes: a photoelectric converter including first and second electrodes, and a photoelectric conversion layer located between the first electrode and the second electrode; a voltage supply circuit applying a bias voltage between the first electrode and the second electrode: an amplifier transistor including a gate electrically connected to the second electrode, the amplifier transistor configured to output a signal corresponding to a potential of the second electrode; and a detection circuit configured to detect a level of the signal from the amplifier transistor. The voltage supply circuit applies the bias voltage in a first voltage range when the level detected by the detection circuit is greater than or equal to a first threshold value, and applies the bias voltage in a second voltage range that is greater than the first voltage range when the level detected by the detection circuit is less than a second threshold value.
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Patent Agency Ranking
公开(公告)号：US10770491B2
公开(公告)日：2020-09-08
申请号：US16401974
申请日：2019-05-02
Inventor： Masashi Murakami , Kazuko Nishimura , Yutaka Abe , Yoshiyuki Matsunaga , Yoshihiro Sato , Junji Hirase
IPC: H01L27/146 , H01L51/42
Abstract: An imaging device includes a photoelectric converter that includes a first electrode, a second electrode, and a photoelectric conversion layer between the first electrode and the second electrode, a first transistor that has a gate connected to the first electrode, and a first capacitor and a switching element that are connected, in series, between the first electrode and either a voltage source or a ground.
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公开(公告)号：US10141364B2
公开(公告)日：2018-11-27
申请号：US14965687
申请日：2015-12-10
Inventor： Kazuko Nishimura , Yutaka Abe , Masashi Murakami , Yoshiyuki Matsunaga
IPC: H04N5/378 , H01L27/146 , H04N5/357 , H04N5/363
Abstract: An imaging device comprising a unit pixel cell comprising: a photoelectric converter that generates an electric signal through photoelectric conversion of incident light; and a signal detection circuit that detects the electric signal, the signal detection circuit comprising a first transistor that amplifies the electric signal, a second transistor that selectively transmits output of the first transistor to outside of the unit pixel cell, and a feedback circuit that forms a feedback loop through which the electric signal is negatively fed back, the feedback loop not passing through the first transistor.
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28.发明授权公开(公告)号：US09917119B2
公开(公告)日：2018-03-13
申请号：US14972153
申请日：2015-12-17
Inventor： Masashi Murakami , Kazuko Nishimura , Yutaka Abe , Yoshiyuki Matsunaga , Yoshihiro Sato , Junji Hirase
IPC: H01L27/146 , H01L51/42
CPC classification number: H01L27/14609 , H01L27/14632 , H01L27/14636 , H01L27/14643 , H01L27/14665 , H01L51/42
Abstract: An imaging device includes: a unit pixel cell comprising: a photoelectric converter generating an electric signal and comprising a first and second electrodes and a photoelectric conversion film located therebetween, the first electrode being located on a light receiving side of the photoelectric conversion film, a signal detection circuit detecting the electric signal and comprising a first transistor and a second transistor that are connected to the second electrode, the first transistor amplifying the electric signal, and a capacitor circuit comprising a first capacitor and a second capacitor having a capacitance value larger than that of the first capacitor that are serially connected to each other, the capacitor circuit being provided between the second electrode and a reference voltage; and a feedback circuit comprising the first transistor and an inverting amplifier and negatively feeding back the electric signal to the second transistor via the first transistor and the inverting amplifier.
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29.发明授权公开(公告)号：US09860468B2
公开(公告)日：2018-01-02
申请号：US15200108
申请日：2016-07-01
Inventor： Kazuko Nishimura , Yutaka Abe
IPC: H04N5/3745 , H03M1/12 , H04N5/378 , H04N5/365
CPC classification number: H04N5/37455 , H03M1/12 , H04N5/3658 , H04N5/378
Abstract: A solid-state image pickup device includes: a pixel portion in which a plurality of pixels are arrayed in matrix; and an Analog-Digital converter. The Analog-Digital converter converts pixel signals, which are generated in the pixel portion, from analog signals into digital signals. The Analog-Digital converter includes: a comparator; and a counter. The comparator compares the analog signals, each of which corresponds to each of the plurality of pixels, with a reference signal. The comparator includes: a first differential transistor to which the reference signal is input; a second differential transistor to which the analog signals are input; a first load transistor; a second load transistor; and a current source transistor. A fluctuation of a voltage between a gate and a source of the first differential transistor is suppressed. This fluctuation follows a voltage fluctuation of a node connected commonly to the second differential transistor and the second load transistor.
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公开(公告)号：US09641774B2
公开(公告)日：2017-05-02
申请号：US15073600
申请日：2016-03-17
Inventor： Sanshiro Shishido , Masahiro Higuchi , Dai Ichiryu , Kazuko Nishimura , Yutaka Abe
CPC classification number: H04N5/357 , H04N5/243 , H04N5/3658 , H04N5/374 , H04N5/37452 , H04N5/37455 , H04N5/378
Abstract: A solid-state imaging device that suppresses streaking includes an imaging region in which unit cells are aligned in matrix, an A/D converter for converting an analog signal generated in the imaging region to a digital signal, and a ramp buffer having an input terminal and an output terminal. Ramp voltage is input to the input terminal, and a reference signal having the ramp voltage is output from the output terminal toward the A/D converter. The A/D converter includes a comparator disposed in each column for comparing an analog signal with a reference signal, and a counter disposed corresponding to the comparator for counting a comparison period of the comparator. The ramp buffer includes a feedback circuit for simultaneously outputting the reference signal to the multiple comparators and controlling the amount of current flowing to the output terminal according to the ramp voltage of the reference signal output from the terminal.
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