公开(公告)号：US20200257453A1

公开(公告)日：2020-08-13

申请号：US16862197

申请日：2020-04-29

Applicant: PURE STORAGE, INC.

Inventor： Peter E. Kirkpatrick

IPC: G06F3/06 ,  G06F16/182 ,  G06F16/18

Abstract: In one implementation, a method includes establishing a connection between a new frontend system resource and an existing frontend system resource for a client network. The method further includes transferring, by a processing device, a frontend system resource role from the existing frontend system resource to the new frontend system resource to enable the existing frontend system resource to operate as a backend system resource.

公开(公告)号：US10452290B2

公开(公告)日：2019-10-22

申请号：US15665134

申请日：2017-07-31

Applicant: Pure Storage, Inc.

Inventor： Peter E. Kirkpatrick ,  Ronald Karr

IPC: G06F12/00 ,  G06F3/06

Abstract: In one implementation, a method includes maintaining a list of available allocation units across a plurality of flash devices of a flash storage system, wherein the flash devices map erase blocks as directly addressable storage, and wherein erase blocks are categorized by the flash storage system as available for use, in use, or unusable, and wherein at least a portion of an erase block can be assigned as an allocation unit. The method further includes receiving data from a plurality of sources, wherein the data is associated with processing a dataset, the dataset comprising multiple file systems and associated metadata. The method further includes determining a plurality of subsets of the data such that each subset is capable of being written in parallel with the remaining subsets, mapping each subset of the plurality of subsets to an available allocation unit, and writing the plurality of subsets in parallel.

公开(公告)号：US10310740B2

公开(公告)日：2019-06-04

申请号：US14748194

申请日：2015-06-23

Applicant: Pure Storage, Inc.

Inventor： John Colgrove ,  Peter E. Kirkpatrick

IPC: G06F3/06

Abstract: Aligning memory access operations to a geometry of a storage device, including: receiving, by a storage array controller, information describing the layout of memory in the storage device; determining, by the storage array controller, a write size in dependence upon the layout of memory in the storage device; and sending, by the storage array controller, a write request addressed to a location within the memory unit in dependence upon the layout of memory in the storage device.

公开(公告)号：US20190108877A1

公开(公告)日：2019-04-11

申请号：US16200301

申请日：2018-11-26

Applicant: Pure Storage, Inc.

Inventor： Hari Kannan ,  Peter E. Kirkpatrick

IPC: G11C11/56 ,  G11C16/10 ,  G06F3/06

CPC classification number: G11C11/5628 ,  G06F3/061 ,  G06F3/0614 ,  G06F3/0656 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/7203 ,  G11C16/10 ,  G11C16/102

Abstract: A method for page writes for triple or higher level cell flash memory is provided. The method includes receiving data in a storage system, from a client that is agnostic of page write requirements for triple or higher level cell flash memory, wherein the page write requirements specify an amount of data and a sequence of writing data for a set of pages to assure read data coherency for the set of pages. The method includes accumulating the received data, in random-access memory (RAM) in the storage system to satisfy the page write requirements for the triple or higher level cell flash memory in the storage system. The method includes writing at least a portion of the accumulated data in accordance with the page write requirements, from the RAM to the triple level cell, or the higher level cell, flash memory in the storage system as an atomic write.

公开(公告)号：US12135878B2

公开(公告)日：2024-11-05

申请号：US17535116

申请日：2021-11-24

Applicant: PURE STORAGE, INC.

Inventor： Yijie Zhao ,  Peter E. Kirkpatrick ,  Andrew R. Bernat

IPC: G06F3/06 ,  G06F12/0868 ,  G11C11/408

Abstract: A storage array controller may receive data to be programmed to a solid-state storage device of a plurality of solid-state storage devices. The storage array controller may identify a type of the data and determine whether to program the data to a low latency portion of the solid-state storage device based on the type of the data. In response to determining to program the data to the low latency portion of the solid-state storage device, the storage array controller may program the data to the low latency portion of the solid-state storage device.

公开(公告)号：US12105620B2

公开(公告)日：2024-10-01

申请号：US17750174

申请日：2022-05-20

Applicant: PURE STORAGE, INC.

Inventor： Roland Dreier ,  Ronald Karr ,  Peter E. Kirkpatrick

IPC: G06F3/06 ,  G06F12/02 ,  H04L67/104 ,  H04L67/1095 ,  H04L67/1097 ,  G06F1/30

CPC classification number: G06F12/0246 ,  G06F3/061 ,  G06F3/0656 ,  G06F3/067 ,  G06F3/0688 ,  G06F3/0689 ,  H04L67/104 ,  H04L67/1095 ,  H04L67/1097 ,  G06F1/30 ,  G06F3/0659 ,  G06F2212/1024 ,  G06F2212/7201

Abstract: A system including embedded storage devices is described. A method of system operation includes determining, by a processing device of a storage system controller operatively coupled via a network to embedded storage devices, that data is to be stored in a first storage portion of a first storage device of the embedded storage devices. The method also includes buffering the data in a second storage portion of a second embedded storage device of the embedded storage devices.

公开(公告)号：US12086029B2

公开(公告)日：2024-09-10

申请号：US18350629

申请日：2023-07-11

Applicant: PURE STORAGE, INC.

Inventor： Peter E. Kirkpatrick ,  Ronald Karr

IPC: G06F11/10 ,  G11C11/16 ,  G11C29/52

CPC classification number: G06F11/1068 ,  G11C29/52

Abstract: Multiple allocation units are selected from a set of solid state storage devices for storage of data. An erasure code and intra-device recovery data associated with the data are generated. The intra-device recovery data is written in each of the plurality of allocation units of the set of solid-state storage devices. The erasure code is written in a subset of the plurality of allocation units.

公开(公告)号：US11869583B2

公开(公告)日：2024-01-09

申请号：US17704747

申请日：2022-03-25

Applicant: Pure Storage, Inc.

Inventor： Hari Kannan ,  Peter E. Kirkpatrick

IPC: G11C11/34 ,  G11C11/56 ,  G11C16/10 ,  G06F3/06 ,  G06F12/02

CPC classification number: G11C11/5628 ,  G06F3/061 ,  G06F3/0614 ,  G06F3/0656 ,  G06F3/0679 ,  G06F12/0246 ,  G11C16/10 ,  G11C16/102 ,  G06F2212/7203

Abstract: A method for page writes for triple or higher level cell flash memory is provided. The method includes receiving data in a storage system, from a client that is agnostic of page write requirements for triple or higher level cell flash memory, wherein the page write requirements specify an amount of data and a sequence of writing data for a set of pages to assure read data coherency for the set of pages. The method includes accumulating the received data, in random-access memory (RAM) in the storage system to satisfy the page write requirements for the triple or higher level cell flash memory in the storage system. The method includes writing at least a portion of the accumulated data in accordance with the page write requirements, from the RAM to the triple level cell, or the higher level cell, flash memory in the storage system as an atomic write.

公开(公告)号：US11836348B2

公开(公告)日：2023-12-05

申请号：US17824704

申请日：2022-05-25

Applicant: PURE STORAGE, INC.

Inventor： Anthony Niven ,  Andrew R. Bernat ,  Eric Kelly Blanchard ,  Ashish Karkare ,  Peter E. Kirkpatrick

IPC: G06F3/06

CPC classification number: G06F3/0607 ,  G06F3/0653 ,  G06F3/0658 ,  G06F3/0679

Abstract: In one implementation, a system resource is added to a storage system, for a resource-preserving upgrade. An upgrade component is coupled to the storage system as a temporary storage system shelf. Storage drives are moved from the storage system to the upgrade component. One or more storage controllers of the upgrade component are promoted to take over data services from the storage system.

公开(公告)号：US20220283935A1

公开(公告)日：2022-09-08

申请号：US17750174

申请日：2022-05-20

Applicant: PURE STORAGE, INC.

Inventor： Roland Dreier ,  Ronald Karr ,  Peter E. Kirkpatrick

IPC: G06F12/02 ,  H04L67/104 ,  H04L67/1095 ,  H04L67/1097 ,  G06F3/06

Abstract: A system including embedded storage devices is described. A method of system operation includes determining, by a processing device of a storage system controller operatively coupled via a network to embedded storage devices, that data is to be stored in a first storage portion of a first storage device of the embedded storage devices. The method also includes buffering the data in a second storage portion of a second embedded storage device of the embedded storage devices.