SEMICONDUCTOR MEMORY DEVICE
    23.
    发明公开

    公开(公告)号:US20240292598A1

    公开(公告)日:2024-08-29

    申请号:US18530748

    申请日:2023-12-06

    IPC分类号: H10B12/00

    摘要: A semiconductor memory device may include active regions defined on a substrate by a device isolation layer, each of the active regions including a first impurity region and a second impurity region, word lines on the active regions and extended in a first direction, capping insulating patterns covering top surfaces of the word lines, respectively, bit lines on the word lines and extended in a second direction crossing the first direction, contact plugs between the bit lines and connected to the second impurity region, and data storages on the contact plugs, respectively. Each of the word lines may include a first metal nitride layer and a second metal nitride layer on the first metal nitride layer. A resistivity of the second metal nitride layer may be smaller than a resistivity of the first metal nitride layer.

    ELECTRONIC DEVICE FOR DISPLAYING IMAGE AND OPERATION METHOD THEREOF

    公开(公告)号:US20240169626A1

    公开(公告)日:2024-05-23

    申请号:US18424060

    申请日:2024-01-26

    IPC分类号: G06T11/60 G04G9/00

    CPC分类号: G06T11/60 G04G9/007

    摘要: An electronic device is provided. The electronic device includes a display, at least one sensor module, a time module which receives time information, a first processor which generates and outputs a first image in a first mode, a second processor which generates and outputs a second image in a second mode driven at lower power than the first mode, and a sensor hub which transmits sensor data, acquired through the sensor module, to the first processor and/or the second processor in the second mode, the second processor being configured to, in the second mode where the first processor is in sleep state, receive a third image associated with the second image through the first processor, combine the third image with the sensor data received from the sensor module and the time information received through the time module to generate the second image, and display the second image on the display.

    DISPLAY DEVICE PERFORMING CHARGE SHARING
    25.
    发明公开

    公开(公告)号:US20230395029A1

    公开(公告)日:2023-12-07

    申请号:US18237515

    申请日:2023-08-24

    IPC分类号: G09G3/3233

    摘要: A display device includes: a charge sharing controller to generate the plurality of group switch control signals based on first bits of (K−1)th digital data groups and second bits of digital data groups. The (K−1)th digital data groups correspond to pixel values of a (K−1)th row of the display panel. The Kth data digital groups correspond to pixel values of a Kth row of the display panel. The charge sharing controller is configured to, with respect to each of the plurality of source line groups, activate each of the plurality of group switch control signals to perform the charge sharing in response to the first bits satisfying a first condition, and the first bits and the second bits satisfying a second condition. The first bits and the second bits are not compared to each other to output a count value.

    DISPLAY DRIVER INTEGRATED CIRCUIT AND METHOD OF OPERATING THE SAME

    公开(公告)号:US20230047827A1

    公开(公告)日:2023-02-16

    申请号:US17691654

    申请日:2022-03-10

    IPC分类号: G09G3/3225

    摘要: A display driver integrated circuit includes a gamma circuit, a control circuit, and an output buffer circuit. The gamma circuit generates a plurality of gamma voltages based on gamma control information, a first gamma power supply voltage and a second gamma power supply voltage. The control circuit calculates a gamma limit value based on panel brightness information, voltage levels of the first and second gamma power supply voltages and the number of the plurality of gamma voltages. The control circuit generates a mode determination signal. The output buffer circuit includes a plurality of buffer circuits. Each of the plurality of buffer circuits includes an input stage and the input stage includes first transistors and second transistors. In a first driving mode, each of the plurality of buffer circuits turns off the first transistors and turns on the second transistors included in the input stage.

    DISPLAY DEVICE FOR PERFORMING A CHARGE SHARING OPERATION

    公开(公告)号:US20220366842A1

    公开(公告)日:2022-11-17

    申请号:US17591001

    申请日:2022-02-02

    IPC分类号: G09G3/3208

    摘要: A display device including: a display panel including first and second data lines, a first and second pixels connected to first and second data lines in first pixel row, third and fourth pixels connected to the second data line in a second pixel row; and a display driver configured to receive image data including first, second, third and fourth pixel data for the first, second, third and fourth pixels, and provide first, second, third and fourth data voltages corresponding to the first, second, third and fourth pixel data to the first, second, third and fourth pixels through the first and second data lines, the display driver further configured to: calculate average data of the first and second pixel data; and selectively perform a charge sharing operation between the first and second data lines according to whether a first increase/decrease condition and a second increase/decrease condition are satisfied.

    SEMICONDUCTOR PACKAGE HAVING STACKED SEMICONDUCTOR CHIPS

    公开(公告)号:US20220130801A1

    公开(公告)日:2022-04-28

    申请号:US17568558

    申请日:2022-01-04

    摘要: Provided is a semiconductor package including a semiconductor stack including a first lower chip, a second lower chip, a gap filler disposed between the first lower chip and the second lower chip, and a first upper chip disposed on an upper surface of the first lower chip, an upper surface of the second lower chip, and an upper surface of the gap filler, the first lower chip includes first upper surface pads and a first upper surface dielectric layer, the second lower chip includes second upper surface pads and a second upper surface dielectric layer, the first upper chip includes lower surface pads and a lower surface dielectric layer, and an area of an upper surface of each of the second upper surface pads is greater than an area of a lower surface of each of the lower surface pads.