-
公开(公告)号：US11817698B2
公开(公告)日：2023-11-14
申请号：US17256667
申请日：2019-06-25
IPC分类号： H02J7/00 , G01R31/396 , G01R31/3835 , H01L29/786
CPC分类号： H02J7/007182 , G01R31/3835 , G01R31/396 , H02J7/0048 , H01L29/7869
摘要： A battery management circuit with a novel structure and a power storage device including the battery management circuit are provided. The power storage device includes a plurality of battery cells connected in series and a battery management circuit. The battery management circuit includes a voltage monitor circuit having a function of acquiring a voltage value between a pair of electrodes of any one of the battery cells. The voltage monitor circuit includes a multiplexer and a buffer circuit for outputting a signal for controlling the multiplexer. The multiplexer and the buffer circuit each include an n-channel transistor. The n-channel transistor is a transistor including an oxide semiconductor in a channel formation region. The multiplexer has a function of retaining an output voltage of the battery cell by setting the transistor in an off state.
-
公开(公告)号：US11778878B2
公开(公告)日：2023-10-03
申请号：US17711172
申请日：2022-04-01
IPC分类号： G09G3/32 , H10K59/131 , G06N3/04 , G06N3/063 , H01L25/065 , H01L27/15 , H10K59/18
CPC分类号： H10K59/131 , G06N3/04 , G06N3/063 , G09G3/32 , H01L25/0652 , H01L27/156 , H10K59/18 , G09G2300/026
摘要： A novel display panel that is highly convenient or reliable is provided. A novel display device is provided. The display panel includes a display region, a first terminal region, and a second terminal region, and the first terminal region is provided not to block the display region and includes a region overlapping with the display region. The first terminal region includes a first group of terminals, and the first group of terminals includes a first terminal. The second terminal region includes a second group of terminals, and the second group of terminals includes a second terminal. The display region includes one group of pixels, another group of pixels, a scan line, and a signal line. The one group of pixels includes a pixel and is arranged in a row direction. The another group of pixels includes the pixel and is arranged in a column direction intersecting the row direction. The scan line is electrically connected to the one group of pixels. The signal line is electrically connected to the another group of pixels, and the signal line is electrically connected to the first terminal and the second terminal.
-
公开(公告)号：US11735134B2
公开(公告)日：2023-08-22
申请号：US17425766
申请日：2020-01-22
发明人： Kazunori Watanabe , Koji Kusunoki
IPC分类号： G09G3/36 , G02F1/1362 , G02F1/1368 , G11C19/28
CPC分类号： G09G3/3677 , G02F1/1368 , G02F1/136286 , G09G3/3611 , G11C19/28 , G09G2310/0267 , G09G2310/0286
摘要： A display apparatus with low power consumption is provided. The display apparatus includes a circuit for boosting a signal voltage output from a gate driver. The signal voltage from the gate driver can be boosted and then supplied to a pixel, which is suitable for driving a display device with a high threshold voltage. Furthermore, by utilizing a boosting function, output of the gate driver can be reduced, and power consumption can also be reduced. By combination with a pixel having a boosting function of image data, a display apparatus with lower power consumption can be achieved.
-
公开(公告)号：US11562675B2
公开(公告)日：2023-01-24
申请号：US17269736
申请日：2019-09-09
发明人： Kouhei Toyotaka , Kazunori Watanabe , Susumu Kawashima , Daisuke Kubota , Tetsuji Ishitani , Akio Yamashita
摘要： A flip-flop circuit is provided. A driver circuit is provided. The flip-flop circuit includes first to fifth input terminals and first to third output terminals, the first input terminal is supplied with a first trigger signal, the second input terminal is supplied with a second trigger signal, the third input terminal is supplied with a batch selection signal, the fourth input terminal is supplied with a first pulse width modulation signal, and the fifth input terminal is supplied with a second pulse width modulation signal. The first output terminal supplies a first selection signal in response to the first pulse width modulation signal in a period from supply of the first trigger signal to supply of the second trigger signal, the first output terminal supplies the first selection signal in a period during which the batch selection signal is supplied, the second output terminal supplies a second selection signal in response to the second pulse width modulation signal in the period from the supply of the first trigger signal to the supply of the second trigger signal, and the third output terminal supplies a third trigger signal.
-
公开(公告)号：US11508307B2
公开(公告)日：2022-11-22
申请号：US17273818
申请日：2019-08-30
IPC分类号： G09G3/3258 , H01L25/16 , H01L27/32
摘要： A display device that can correct the threshold voltage of a driving transistor without a correction of image data is provided. A display device including a pixel provided with a driving transistor, a display element, and a memory circuit and a correction data generation circuit is related. One of a source and a drain of the driving transistor is electrically connected to one electrode of the display element, and a gate of the driving transistor is electrically connected to the memory circuit. In a first period, the correction data generation circuit generates correction data that is data for correcting the threshold voltage of the driving transistor. In a second period, first data is written to the memory circuit. In a third period, second data is supplied to the pixel, whereby third data in which the second data is added to the first data is generated. In a fourth period, an image corresponding to the third data is displayed by the display element.
-
公开(公告)号：US10957720B2
公开(公告)日：2021-03-23
申请号：US16760495
申请日：2018-10-29
摘要： To provide a display device having a small circuit area and low power consumption. The display device includes a semiconductor device and a D/A converter circuit, and the semiconductor device includes first to third transistors and first and second capacitors. A first terminal of the first transistor is electrically connected to a first terminal of the first capacitor. A first terminal of the second transistor is electrically connected to a gate of the third transistor, a second terminal of the first capacitor, and a first terminal of the second capacitor. A first terminal of the third transistor is electrically connected to a second terminal of the second capacitor. An output terminal of the D/A converter circuit is electrically connected to a second terminal of the first transistor and a second terminal of the second transistor. Supply of a potential to the first terminal of the first capacitor changes (finely adjusts) the potential of the gate of the third transistor to be more precise than a potential that can be output from the D/A converter circuit.
-
公开(公告)号：US20200168739A1
公开(公告)日：2020-05-28
申请号：US16778336
申请日：2020-01-31
发明人： Shunpei Yamazaki , Masashi Tsubuku , Kosei Noda , Kouhei Toyotaka , Kazunori Watanabe , Hikaru Harada
IPC分类号： H01L29/786 , H01L29/423 , H01L29/417 , H01L27/12 , H01L29/24 , H01L27/108 , G06F15/76 , H01L49/02 , H01L27/11
摘要： An object is to provide a memory device including a memory element that can be operated without problems by a thin film transistor with a low off-state current. Provided is a memory device in which a memory element including at least one thin film transistor that includes an oxide semiconductor layer is arranged as a matrix. The thin film transistor including an oxide semiconductor layer has a high field effect mobility and low off-state current, and thus can be operated favorably without problems. In addition, the power consumption can be reduced. Such a memory device is particularly effective in the case where the thin film transistor including an oxide semiconductor layer is provided in a pixel of a display device because the memory device and the pixel can be formed over one substrate.
-
公开(公告)号：US09780121B2
公开(公告)日：2017-10-03
申请号：US14639336
申请日：2015-03-05
IPC分类号： H01L27/12
CPC分类号： H01L27/124 , G06F3/0412 , G06F3/044 , G06F2203/04102 , G06F2203/04103 , H01L27/1225 , H01L27/1255
摘要： To provide a touch sensor including a transistor and a capacitor in which the transistor and the capacitor are electrically connected to each other, the capacitor includes a pair of electrodes and a dielectric layer, the dielectric layer is located between the pair of electrodes, and one of the pair of electrodes includes an oxide conductor layer. To provide a touch panel including the touch sensor, a light-blocking layer, and a display element in which the touch sensor is located more on the display surface side of the touch panel than on the display element side, the light-blocking layer is located more on the display surface side than on the touch sensor side, the display element includes a portion overlapping with the capacitor, and the light-blocking layer includes a portion overlapping with the transistor.
-
公开(公告)号：US08947153B2
公开(公告)日：2015-02-03
申请号：US13668426
申请日：2012-11-05
发明人： Jun Koyama , Kazunori Watanabe
IPC分类号： H03K17/687 , H03K17/73 , H01L29/423 , H01L27/12 , H01L29/24 , H01L29/786 , H01L29/22 , H01L29/739
CPC分类号： H01L29/24 , H01L27/1225 , H01L29/22 , H01L29/42392 , H01L29/7391 , H01L29/78642 , H01L29/7869 , H03K17/687 , H03K17/73
摘要： An object is to provide a semiconductor device that can realize a function of a thyristor without complication of the process. A semiconductor device including a memory circuit that stores a predetermined potential by reset operation and initialization operation is provided with a circuit that rewrite data in the memory circuit in accordance with supply of a trigger signal. The semiconductor device has a structure in which a current flowing through the semiconductor device is supplied to a load by rewriting data in the memory circuit, and thus can function as a thyristor.
摘要翻译： 目的在于提供一种可以实现晶闸管功能的半导体器件，而不会使工艺复杂化。 包括通过复位操作和初始化操作来存储预定电位的存储电路的半导体器件设置有根据触发信号的提供重写存储电路中的数据的电路。 半导体器件具有这样的结构，其中流过半导体器件的电流通过重写存储器电路中的数据而被提供给负载，并且因此可以用作晶闸管。
-
公开(公告)号：US20140021904A1
公开(公告)日：2014-01-23
申请号：US13930099
申请日：2013-06-28
IPC分类号： H02J7/00
CPC分类号： H02J7/0083 , H01L2924/0002 , H02J7/0078 , H01L2924/00
摘要： A charging device used for charging a storage battery includes a first circuit that generates a current which depends on a charging current of the storage battery; a second circuit in which charge is accumulated by periodical supply of the current which depends on the charging current; and a third circuit that outputs a signal indicating completion of charge of the storage battery when the potential of the second circuit reaches a reference potential. The second circuit includes a capacitor and a transistor in which an oxide semiconductor is used for a channel formation region. The transistor is turned on or off in response to a pulse signal input to a gate of the transistor. The capacitor accumulates charge when the current depending on the charging current flows through the transistor.
摘要翻译： 用于对蓄电池充电的充电装置包括产生取决于蓄电池的充电电流的电流的第一电路; 第二电路，其通过依赖于充电电流的电流的周期性供应来累积电荷; 以及第三电路，当第二电路的电位达到参考电位时，输出表示蓄电池的充电完成的信号。 第二电路包括电容器和其中氧化物半导体用于沟道形成区域的晶体管。 响应于输入到晶体管的栅极的脉冲信号，晶体管导通或截止。 当根据充电电流流动的电流流过晶体管时，电容器会蓄积电荷。
-
-
-
-
-
-
-
-
-
搜索结果
99 条记录 (耗时 0.027 秒)
